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MPC5668EVB Users Manual Rev 0.1 May 2009
MPC5668EVBUM/D Page 13 of 29
The ONCE and NEXUS
connectors are located at
the left hand edge of the
EVB
3.3.3 Reset Boot Configuration (J69)
The MPC5668 has a single boot configuration pin (BOOTCFG) which determines the boot location of the
MCU based on the state of the pin at POR (Power On Reset). This is shown in the table below:
Table 3-10 BOOTCFG Control
Jumper Position PCB Legend Description
J69 (BOOT CFG)
1-2 (D) FLASH MCU boots from internal flash
2-3 SERIAL MCU boots from external serial source
3.4 ONCE and Nexus Configuration (J32, J70)
The EVB supports a standard ONCE cable with a 14-pin 0.1” walled header footprint. There is also a 38-pin
MICTOR connector for Nexus debug. Nexus debug is only supported when using a 256MAPBGA MPC5668.
There are two generic jumpers associated with both the ONCE and Nexus, as detailed below
Some debug probes have the ability to assert and also monitor the state of the MCU reset line. This is not
possible when the reset signal is buffered so a jumper (J32) is included to allow routing the debug reset signal
direct to the MCU reset pin or via the EVB Reset-In buffering.
Table 3-11 JTAG / NEXUS Target Reset Routing
Jumper Position PCB Legend Description
J32 (JRST)
1-2 (D)
BUF
JTAG reset signal is buffered to MCU RESET pin
(connected to the MCU Reset-In circuitry)
2-3
DIR
JTAG reset signal is connected direct to MCU
RESET pin
Some debug manufacturers specify whether the debug TCLK signal is pulled low or high. Jumper J70
provides the ability to select whether TCLK is pulled to GND or VDDE2.
For low power operation, TCLK
should be pulled to GND.
Table 3-12 ONCE / NEXUS TCLK Termination Control
Jumper Position PCB Legend Description
J70
(TCLK PULL)
1-2 (D)
VDDE2
JTAG / NEXUS TCLK signal is pulled to VDDE2 via
10K
Ω
2-3
GND
JTAG / NEXUS TCLK signal is pulled to GND via
10K
Ω
Note – J70 is located to the right of the reset LED’s, out-with the ONCE / Nexus connector area.
ON