NXP Semiconductors
Quick start ADC1610S series (F1 or F2 versions)
Quick start
© NXP B.V. 2011. All rights reserved.
Quick start
Rev. 5 — January 2011
20 of 28
3.3.5 Acquisition page
This page will acquire data to evaluate the high dynamic performance of the device:
Fig 13. SW_ADC_1_r02: “Acquisition” page
Before proceeding to any acquisition, the user needs to do the following entries:
•
the sampling frequency Fs: 122.88 Msps in our example (field
);
•
the input frequency Fin: 5 MHz in our example (field
);
•
the number of samples to be acquired 65536 in our example (field
);
•
indicate whether it is CMOS or LVDS DDR (field
);
•
Press the “INITIALIZATION” button
. It will initialized the HSDC-EXTMOD board:
−
FPGA is ready (red LED is flashing ¼ on and ¾ off) ;
−
PLL embedded is locked (green LED is on);
•
indicate whether Fin or Fs are coherent or not (field
):
−
if signals are coherent, selected which Fin or Fs are fixed for the calculation (see
appendix
A.1
);
−
If signals are not coherent, select the window for FFT processing to apply (the Blackman
window gives better results).
•
Press the “ACQUIRE” button
to display the results from the FFT processing. The results
fields
will be updated automatically.
•
press “STOP”
button to stop acquisition;
•
field
allows to do FFT averaging over up to 255 trials, suitable for small signal analysis;
•
Field
allows storing dynamic results to text file. Click on the check box, enter a header as a
comment and browse to indicate where to store data file.
Table 7
shows how data are stored: