MC56F8367EVM User Manual, Rev. 2
2-28
Freescale Semiconductor
Preliminary
2.15.1 Address Bus Expansion Connector
The address bus expansion connector contains the 56F8367’s 24 external memory address signal
lines. Address lines A6 and A7 can optionally be used as GPIO Port E lines (bits 2 and 3).
Address lines A8 - A15 can optionally be used as GPIO Port A lines (bits 0 - 7). Address lines
A0 - A5 can optionally be used as GPIO Port A lines (bits 8 - 13). Address lines A16 - A23 are
MPIO signals, which can be configured as A16 - A23 or GPIO Port B bits 0 - 7. Refer to
for the address bus connector information.
Table 2-16. External Memory Address Bus Connector Description
J4
Pin #
Signal
Pin #
Signal
1
A0 / PA8
2
A1 / PA9
3
A2 / PA10
4
A3 / PA11
5
A4 / PA12
6
A5 / PA13
7
A6 / PE2
8
A7 / PE3
9
A8 / PA0
10
A9 / PA1
11
A10 / PA2
12
A11 / PA3
13
A12 / PA4
14
A13 / PA5
15
A14 / PA6
16
A15 / PA7
17
PB0 / A16
18
PB1 / A17
19
PB2 / A18
20
PB3 / A19
21
PB4 / A20
22
PB5 / A21
23
PB6 / A22
24
PB7 / A23
19
GND
20
+3.3V
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