Nvidia JETSON TX2, Руководство пользователя

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NVIDIA Jetson TX2/TX2i OEM Product Design Guide
JETSON TX2/TX2i OEM PRODUCT | DESIGN GUIDE | 20180618 102
Pin # Module Pin Name Tegra Signal Usage/Description
Usage on the Carrier
Board
Direction Pin Type
H6 I2S2_SDOUT DMIC2_CLK I2S Audio Port 2 Data Out Bidir CMOS – 1.8V
H7 GPIO3_CAM1_RST# QSPI_IO0 Camera 1 Reset or GPIO
Camera Connector
Output CMOS – 1.8V
H8 GPIO2_CAM0_RST# QSPI_CS_N Camera 0 Reset or GPIO Output CMOS – 1.8V
H9 UART3_RX UART4_RX (via mux) UART 3 Receive
Optional source of
UART on Exp. Header
Input CMOS – 1.8V
H10 UART3_TX UART4_TX (via mux) UART 3 Transmit Output CMOS – 1.8V
H11 UART0_CTS# UART1_CTS UART 0 Clear to Send
Debug Header
Input CMOS – 1.8V
H12 UART0_TX UART1_TX UART 0 Transmit Output CMOS – 1.8V
H13 GPIO8_ALS_PROX_INT GPIO_PQ4 Proximity sensor Interrupt or GPIO Sensor Input CMOS – 1.8V
H14 SPI2_CLK GPIO_WAN5 SPI 2 Clock
Display/Camera Conns.
Bidir CMOS – 1.8V
H15 SPI2_MISO GPIO_WAN6 SPI 2 Master In / Slave Out Bidir CMOS – 1.8V
H16 SDCARD_PWR_EN GPIO_EDP3 SD Card power switch Enable
SD Card
Output CMOS – 1.8V
H17 SDCARD_D1 SDMMC1_DAT1 SD Card (or SDIO) Data 1 Bidir CMOS – 3.3V/1.8V
H18 SDCARD_D0 SDMMC1_DAT0 SD Card (or SDIO) Data 0 Bidir CMOS – 3.3V/1.8V
H19 GND − GND GND − GND
H20 CSI4_D1 – CSI_E_D1_N Camera, CSI 4 Data 1 –
Camera Connector
Input
MIPI D-PHY
H21 CSI_E_D1_P Camera, CSI 4 Data 1+ Input
H22 GND − GND GND − GND
H23 CSI2_D1 – CSI_C_D1_N Camera, CSI 2 Data 1 –
Camera Connector
Input
MIPI D-PHY
H24 CSI_C_D1_P Camera, CSI 2 Data 1+ Input
H25 GND − GND GND − GND
H26 CSI0_D1 – CSI_A_D1_N Camera, CSI 0 Data 1 –
Camera Connector
Input
MIPI D-PHY
H27 CSI_A_D1_P Camera, CSI 0 Data 1+ Input
H28 GND − GND GND − GND
H29 DSI_C_D1_P Display, DSI 2 Data 1+
Display Connector
Output
MIPI D-PHY
H30 DSI2_D1 – DSI_C_D1_N Display, DSI 2 Data 1 – Output
H31 GND − GND GND − GND
H32 DSI_A_D1_P Display, DSI 0 Data 1+
Display Connector
Output
MIPI D-PHY
H33 DSI0_D1 – DSI_A_D1_N Display, DSI 0 Data 1 – Output
H34 GND − GND GND − GND
H35 DP0_TX3 – HDMI_DP0_TXDN3 DisplayPort 0 Lane 3 – or HDMI Clk Lane –
Display Connector
Output
AC-Coupled on carrier
board H36 HDMI_DP0_TXDP3 DisplayPort 0 Lane 3+ or HDMI Clk Lane+ Output
H37 GND − GND GND − GND
H38 DP0_TX0 – HDMI_DP0_TXDN2 DisplayPort 0 Lane 0 – or HDMI Lane 2 –
Display Connector
Output
AC-Coupled on carrier
board
H39 HDMI_DP0_TXDP2 DisplayPort 0 Lane 0+ or HDMI Lane 2+ Output
H40 GND − GND GND − GND
H41 PEX_RX0P
PCIe 1 (PCIe #2 Lane 0 muxed
w/USB 3.0 Port #0)
USB 3.0 Type A
(Default) or M.2 Key E
Input
PCIe PHY, AC-Coupled on
carrier board
H42 PEX1_RX – PEX_RX0N
PCIe 1 Receive – (PCIe #2 Lane 0 muxed
w/USB 3.0 Port #0)
Input
H43 GND − GND GND − GND
H44 PEX_RX4P PCIe 0 (PCIe IF #0 Lane 0)
PCIe x4 Connector
Input
PCIe PHY, AC-Coupled on
carrier board
H45 PEX0_RX – PEX_RX4N PCIe 0 Receive – (PCIe IF #0 Lane 0) Input
H46 GND − GND GND − GND
H47 G − GbE Transformer Data 3+
LAN
Bidir
MDI
H48 GBE_MDI3 – − GbE Transformer Data 3 – Bidir
H49 GND − GND GND − GND
H50 RSVD − Not used − − −
Legend
Ground Power RSVD on Jetson TX2 (available on TX2i) Reserved Redefined for Jetson TX2i
Notes:
1.
The Usage/Description column uses the module port/lane/interface references.
2.
In the Type/Dir column, Output is from the module. Input is to the module. Bidir is for Bidirectional signals.
3.
These pins are handled as Open-Drain on the carrier board