1.4 Principle of operation
FRA5097
1-11
1.4.2 Block diagram
sampling
clock
Built-in th
ermal
printer
KE
Y BD
SW-P
S
LC
D
DCPS BD
+24V
+5V
CH1
±8
V
±
24V
OS
C
CH
1
CH
2
AUX
CH
2
±8V
OSC
±
15V
GPIB
+24V
PREAMP BD
A/D
OSC BD
Local OSC
PREAMP BD
A/D
AD CPU
BD
CPU BD
USB
USB
LIN
E
USB flash drive
Fig. 1-3 FRA block diagram
Содержание FRA5097
Страница 1: ...NF Corporation FREQUENCY RESPONSE ANALYZER FRA5097 INSTRUCTION MANUAL ...
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Страница 3: ...DA00014283 002 FRA5097 Frequency Response Analyzer Instruction Manual ...
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Страница 35: ...2 2 Mounting and installation FRA5097 2 7 Fig 2 3 Removal of foot stands ...
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