LIS-SDI Rev.
2
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16
The third BCD switch from the top is used to adjust the phase in steps of ten lines.
The last BCD switch is used to adjust the phase in steps of 1 line.
The phase in lines is set with respect to Black&Burst when Black&Burst is detected and is
not used when Black&Burst is absent.
8.3 Delay range
The minimum delay through the LIS-SDI is 41 27MHz video samples. The maximum delay
through the card is 1 line and 41 27MHz samples.
9. Interface with GYDA or other controllers
LIS-SDI follows the flashlink
®
-protocol, see the definition of the protocol available from our
web site:
http://www.network-electronics.com/
. LIS-SDI can also be used with any controller or
controller system that adheres to the flashlink
®
-protocol, using the RS422 bus. For more
information on the electrical interconnect, see the documentation of
FR-2RU-10-2
. The
available commands are shown in Table 3.
Command Response
Comment
?
Yes
The “Hello” command.
info
Yes
Gives back the card state.
EDH on
xxxxOK
Turn on EDH in output SDI.
EDH off
xxxxOK
Turn off EDH in output SDI.
Lsync on
xxxxOK
Set lsync mode on.
Lsync off
xxxxOK
Set lsync mode off.
TRSReplace on
xxxxOK
Replace SYNC words.
TRSReplace off
xxxxOK
Use orignal sync words.
delay [xxx] [xxxx]
xxxxOK
Set the delay in lines and samples.
get [0xHH]
Yes
Get a value from a numbered register.
set [0xHH] [0xHH]
No
Set a value to a numbered register.
Table 3: All commands available to the user
9.1 The '?' command
According to the flashlink
®
-protocol, no card can use the RS422-bus before the '?' (hello)
command is sent the card at least once. The response from LIS-SDI will be:
xxxxLIS-SDI\
PIC sw rev X.X.X\
FPGA sw rev X\
Protocol ver X.X
Here xxxx
denotes the source and destination rack and slot coordinates, while
X
represents a
version number. As of medio April 2003, these revisions would be:
xxxxLIS-SDI\
