NEC V850E/MA1, Руководство пользователя

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CHAPTER 3 CPU FUNCTION
86
User’s Manual U14359EJ4V0UM
(2/9)
Bit Units for Manipulation Address Function Register Name Symbol R/W
1 Bit 8 Bits 16 Bits
After Reset
FFFFF044H Port DL mode control register PMCDL R/W
{
0000H/FFFFH
FFFFF044H Port DL mode control register L PMCDLL R/W
{ {
00H/FFH
FFFFF045H Port DL mode control register H PMCDLH R/W
{ {
00H/FFH
FFFFF048H Port CS mode control register PMCCS R/W
{ {
00H/FFH
FFFFF049H Port CS function control register PFCCS R/W
{ {
00H
FFFFF04AH Port CT mode control register PMCCT R/W
{ {
00H/F3H
FFFFF04CH Port CM mode control register PMCCM R/W
{ {
00H/3FH
FFFFF04DH Port CM function control register PFCCM R/W
{ {
00H
FFFFF04EH Port CD mode control register PMCCD R/W
{ {
00H/0FH
FFFFF04FH Port CD function control register PFCCD R/W
{ {
00H
FFFFF052H Port BD mode control register PMCBD R/W
{ {
00H
FFFFF060H Chip area select control register 0 CSC0 R/W
{
2C11H
FFFFF062H Chip area select control register 1 CSC1 R/W
{
2C11H
FFFFF066H Bus size configuration register BSC R/W
{
0000H/5555H
FFFFF068H Endian configuration register BEC R/W
{
0000H
FFFFF06EH System wait control register VSWC R/W
{
77H
FFFFF080H DMA source address register 0L DSA0L R/W
{
Undefined
FFFFF082H DMA source address register 0H DSA0H R/W
{
Undefined
FFFFF084H DMA destination address register 0L DDA0L R/W
{
Undefined
FFFFF086H DMA destination address register 0H DDA0H R/W
{
Undefined
FFFFF088H DMA source address register 1L DSA1L R/W
{
Undefined
FFFFF08AH DMA source address register 1H DSA1H R/W
{
Undefined
FFFFF08CH DMA destination address register 1L DDA1L R/W
{
Undefined
FFFFF08EH DMA destination address register 1H DDA1H R/W
{
Undefined
FFFFF090H DMA source address register 2L DSA2L R/W
{
Undefined
FFFFF092H DMA source address register 2H DSA2H R/W
{
Undefined
FFFFF094H DMA destination address register 2L DDA2L R/W
{
Undefined
FFFFF096H DMA destination address register 2H DDA2H R/W
{
Undefined
FFFFF098H DMA source address register 3L DSA3L R/W
{
Undefined
FFFFF09AH DMA source address register 3H DSA3H R/W
{
Undefined
FFFFF09CH DMA destination address register 3L DDA3L R/W
{
Undefined
FFFFF09EH DMA destination address register 3H DDA3H R/W
{
Undefined
FFFFF0C0H DMA transfer count register 0 DBC0 R/W
{
Undefined
FFFFF0C2H DMA transfer count register 1 DBC1 R/W
{
Undefined
FFFFF0C4H DMA transfer count register 2 DBC2 R/W
{
Undefined
FFFFF0C6H DMA transfer count register 3 DBC3 R/W
{
Undefined
FFFFF0D0H DMA addressing control register 0 DADC0 R/W
{
0000H