CHAPTER 6 16-BIT TIMER 90
User’s Manual U15075EJ2V1UD
127
6.4 16-Bit Timer 90 Operation
6.4.1 Operation as timer interrupt
16-bit timer 90 can generate interrupts repeatedly each time the free-running counter value reaches the value set
to CR90. Since this counter is not cleared and holds the count even after an interrupt is generated, the interval time
is equal to one cycle of the count clock set in TCL901 and TCL900.
To operate 16-bit timer 90 as a timer interrupt, the following settings are required.
•
Set count values in CR90
•
Set 16-bit timer mode control register 90 (TMC90) as shown in Figure 6-5.
Figure 6-5. Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation
−
0/1
0/1
0/1
0/1
0/1
0/1
0/1
TOD90 TOF90 CPT901 CPT900 TOC90 TCL901 TCL900 TOE90
TMC90
Setting of count clock (see
Table 6-2
)
Caution If both the CPT901 and CPT900 flags are set to 0, the capture operation is prohibited.
When the count value of 16-bit timer counter 90 (TM90) matches the value set in CR90, counting of TM90
continues and an interrupt request signal (INTTM90) is generated.
Table 6-2 shows interval time, and Figure 6-6 shows timing of timer interrupt operation.
Caution When rewriting the value in CR90 during a count operation, be sure to execute the following
processing.
<1> Set interrupt disabled (set TMMK90 (bit 1 of interrupt mask flag register 1 (MK1)) to 1).
<2> Disable inversion control of timer output data (set TOC90 to 0)
If the value in CR90 is rewritten in the interrupt-enabled state, an interrupt request may occur at
the moment of rewrite.
Table 6-2. Interval Time of 16-Bit Timer 90
TCL901
TCL900
Count Clock
Interval Time
0 0
2
2
/f
X
(0.8
µ
s)
2
18
/f
X
(52.4 ms)
0 1
2
6
/f
X
(12.8
µ
s)
2
22
/f
X
(838.9 ms)
1 0
2
7
/f
X
(25.6
µ
s)
2
23
/f
X
(1.68 s)
1 1
1/f
XT
(30.5
µ
s)
2
16
/f
XT
(2.0 s)
Remarks 1.
f
X
:
Main system clock oscillation frequency
2.
f
XT
: Subsystem clock oscillation frequency
3.
The parenthesized values apply to operation at f
X
= 5.0 MHz or f
XT
= 32.768 kHz.
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