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Chapter 10 Clock Synchronous Serial Interface
10
(1) Shift register (SIO)
Converts 8-bit serial data into 8-bit parallel data and vice versa. The SIO is used for both transmission and
reception.
Data is shifted in (received) or shifted out (transmitted) from the MSB.
The actual transmission/reception is controlled by writing or reading the contents of the SIO.
The 8-bit manipulation instruction can read or write the contents of this register. The contents become
undefined when RESET is input.
(2) SO latch
Retains the output level of the SO/SB0 pin. In serial bus interface (SBI) mode, the software can directly control
the latch.
(3) Serial clock selector
Selects the serial clock to be used.
(4) Serial clock counter
Counts the number of serial clock pulses output or input during transmission or reception and checks whether
8-bit data is transmitted or received.
(5) Interrupt signal generator
Controls whether an interrupt request is generated when the serial clock counter counts eight serial clock
pulses. In three-wire serial I/O mode, an interrupt request is generated each time eight pulses are counted.
In SBI mode, an interrupt request is generated whenever the conditions are satisfied.
(6) Serial clock controller
Controls the supply of the serial clock to the shift register. If the internal clock is used, the controller also
controls the clock output to the SCK pin.
(7) Busy/acknowledge output circuit, bus release/command/acknowledge detector
Output and detect control signals in SBI mode. These circuits do not operate in three-wire serial I/O mode.
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