Reconfigurable FPGA
PXIe-5763 modules are available with multiple FPGA options. The following table lists the
FPGA specifications for the PXIe-5763 FPGA options.
Table 3. Reconfigurable FPGA Options
KU035
KU040
KU060
LUTs
203,128
242,200
331,680
DSP48 slices (25 × 18
multiplier)
1,700
1,920
2,760
Embedded Block RAM
19.0 Mb
21.1 Mb
38.0 Mb
Default timebase
80 MHz
Timebase reference sources
PXI Express 100 MHz (PXIe_CLK100)
Data transfers
DMA, interrupts, programmed I/O, multi-gigabit transceivers
5
Number of DMA channels
60
Note
Table 3 depicts the total number of FPGA resources available on the part.
The number of resources available to the user is slightly lower, as some FPGA
resources are consumed by board-interfacing IP for PCI Express, device
configuration, and various board I/O. For more information, contact NI support.
Note
For FPGA designs using the majority of KU040 or KU060 FPGA resources
while running at clock rates over 150 MHz, the module may require more power
than is available. If the module attempts to draw more than allowed per its
specification, the module protects itself and reverts to a default FPGA personality.
Refer to the getting started guide for your module or contact NI support for more
information.
Onboard DRAM
Note
DRAM is available on devices with KU040 and KU060 FPGAs only.
Memory size
4 GB (2 banks of 2 GB)
DRAM clock rate
1064 MHz
Physical bus width
32 bit
5
KU040 and KU060 options only.
PXIe-5763 Specifications
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© National Instruments
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