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Figure 1. Digital I/O Connector
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
Reserved
GND
MGT Rx+ 0
MGT Rx– 0
GND
MGT Rx+ 1
MGT Rx– 1
GND
DIO 4
DIO 5
GND
MGT REF+ / DIO 0
MGT REF– / DIO 1
GND
MGT Rx+ 2
MGT Rx– 2
GND
MGT Rx+ 3
MGT Rx– 3
GND
5.0 V
5.0 V
GND
MGT Tx+ 0
MGT Tx– 0
GND
MGT Tx+ 1
MGT Tx– 1
GND
DIO 6
DIO 7
GND
DIO 2
DIO 3
GND
MGT Tx+ 2
MGT Tx– 2
GND
MGT Tx+ 3
MGT Tx– 3
GND
Reserved
MGT TX± <3..0> Channels
Minimum differential output voltage
4
170 mV
pk-pk
into 100 Ω, nominal
I/O coupling
AC-coupled with 100 nF capacitor
MGT RX± <3..0> Channels
Differential input voltage range
≤ 6.6 GB/s
150 mV
pk-pk
to 2000 mV
pk-pk
, nominal
> 6.6 GB/s
150 mV
pk-pk
to 1250 mV
pk-pk
, nominal
Differential input resistance
100 Ω, nominal
I/O coupling
DC-coupled, requires external capacitor
4
800 mV
pk-pk
when transmitter output swing is set to the maximum setting.
4
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PXIe-5763 Specifications