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Chapter 3
Acquiring Analog Input
A programmable internal counter divides down the AI Sample Clock Timebase to generate the
AI Sample Clock. The output of the counter is called the Onboard Clock signal. Onboard Clock
is the default sample clock source for hardware-timed acquisitions unless you specify an external
source.
Several other internal signals can be routed to the AI Sample Clock Signal through internal
routes. Refer to
Device Routing in MAX
in the
NI-DAQmx Help
or the
LabVIEW Help
for more
information.
Using an External Source
One of the following external signals can be used as the source of AI Sample Clock:
•
PFI <0,1>
•
PXI_Trig <0..7>
•
PXI_STAR
•
PXIe_DSTAR <A,B>
Routing AI Sample Clock Signal to an Output Terminal
You can route AI Sample Clock out to any PXI_Trig <0..7>, or PXIe_DSTARC terminal. The
output terminal signal pulses for each AI Sample Clock, with the rising edge of each pulse
coincident with the start of the ADC conversion. The active edge of this output pulse cannot be
changed.
All PFI terminals are inputs only, and cannot be used to export the AI Sample Clock.
AI Sample Clock Time
b
ase Signal
The AI Sample Clock Timebase (ai/SampleClockTimebase) signal is divided down to provide a
source for the AI Sample Clock.
You can route any of the following signals to be the AI Sample Clock Timebase signal:
•
100 MHz Timebase (default)
•
20 MHz Timebase
•
100 kHz Timebase
•
PXI_CLK10
•
PXI_Trig <0..7>
•
PFI <0,1>
•
PXI_STAR
•
PXIe_DSTAR <A, B>
AI Sample Clock Timebase is not available as an output on the I/O connector.
