National Instruments PXIe-4310, Руководство пользователя

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PXIe-4310 User Manual
Reference Clock
The clock generation subsystem uses either an internal or external source as the reference clock
to generate timing signals. The only internal source for the reference clock is the onboard
100 MHz oscillator. An external reference clock can be sourced using the signals shown in
Table 3-2.
Since the external reference clock is the input of a PLL, it must be 5 MHz, 10 MHz, 20 MHz, or
100 MHz. The PLL locks to the external reference clock and produces a 100 MHz output.
Caution
Do not disconnect an external clock once the modules have been
synchronized or are used by a task. Doing so may cause NI-DAQmx to return an
error. Make sure that all tasks using a reference clock are stopped before
disconnecting it.
The 100 MHz reference clock is used to generate the 100 MHz timebase, 20 MHz timebase, and
100 kHz timebase, which can be used as the AI Sample Clock timebase.
10 MHz RefClk
The 10 MHz reference clock is generated by dividing down the onboard 100 MHz oscillator. The
10 MHz RefClk can be used to synchronize other devices to the PXIe-4310 module. The 10 MHz
RefClk can be routed to the PXI_Trig <0..7> terminals. Other devices connected to the PXI_Trig
bus can use this signal as a clock input.
PXI Express Clock and Trigger Signals
PXIe_CLK100
PXIe_CLK100 is a common, low-skew 100 MHz reference clock used for synchronization
of multiple modules in a PXI Express measurement or control system. The PXI Express
backplane is responsible for generating PXIe_CLK100 independently to each peripheral slot
in a PXI Express chassis. For more information, refer to the
PXI Express Specification
at
www.pxisa.org
.
Table 3-2. Clock Signal Sourcing
Signal Description
PXI_Trig<0..7> Bidirectional bus connecting each board in a chassis.
PFI<0,1> External user input.
PXIe_Clk100 100 MHz clock routed to all slots in the chassis.
PXI_STAR Point-to-point route from the System Timing Slot to all other slots.
PXIe_DSTAR<A, B> Point-to-point differential routes from the System Timing Slot to all
other slots.