Chapter 3
Device Overview and Theory of Operation
3-14
ni.com
Synchronizing Multiple Devices
This section provides low-level background information about the
electrical signals needed to tightly synchronize NI 447
X
modules. This
section describes three signals: the oversample clock, the SYNC pulse,
and the acquisition start trigger.
Delta-Sigma ADCs and the Oversample Clock
The 24-bit ADCs employed on the NI 447
X
belong to a class of
components called
delta-sigma
(or
∆Σ
) ADCs. The advantages of
delta-sigma components as compared to other digitizers include high
dynamic range, excellent linearity, and digital filtering to remove aliased
frequency components from the data.
Most ADCs, including the successive approximation ADCs used in many
DAQ devices, are timed by a
sample clock
. This clock is simply a digital
pulse train that drives the acquisition. In most cases, a rising edge on the
sample clock signal starts a conversion. When an ADC is timed by a sample
clock, the acquisition rate is exactly equal to the frequency of the sample
clock. For example, a 10 kHz sample clock produces a 10 kS/s acquisition
rate.
One distinguishing feature of delta-sigma converters, including those on
the NI 447
X
, is that they use an
oversample clock
to drive the conversion.
As the name implies, the physical frequency of the oversample clock signal
is greater than the sample rate. When a single NI 447
X
acquires data, the
high-frequency oversample clock is locally generated by a Direct Digital
Synthesis (DDS) chip on the device. If two or more NI 447
X
modules are
synchronized, they must share the oversample clock to ensure tight
synchronization of the acquisition.
♦
NI PXI-4472
The NI PXI-4472 can use either its internal DDS timebase or a timebase
received from another NI PXI-4472 over the PXI backplane. If you
configure the NI PXI-4472 to use the internal timebase and place the
NI PXI-4472 in Slot 2, you can program the device to drive its internal
timebase over the PXI backplane to another NI PXI-4472 that you program
to receive this timebase signal. The default configuration at startup is to use
the internal timebase without driving the PXI backplane timebase signal.
This timebase is software selectable.
