Technical Information
Chapter 3
GPIB-PRL User Manual
3-4
© National Instruments Corp.
0.5 µsec (min)
0.5 µsec (min)
0.5 µsec (min)
0.5 µsec (min)
STROBE*
DATA
ACKNLG*
Figure 3-1. G Mode Parallel Interface Timing
P Mode Operation
P mode operation is similar to G mode operation except that the data is
input from the parallel port and output to the GPIB port. The incoming data
is stored in the internal data buffer until it is accepted by the GPIB device.
The GPIB functionality implemented in P Mode is the ability to address a
GPIB device to listen, the ability to talk and send data, and the ability to
assert IFC* and to send the device clear command.
Upon power-on, the GPIB-PRL will read the status of the configuration
switches and initialize the system. If switch 3 is OFF, the GPIB-PRL will
be the System Controller and will assert IFC* for 500
µ
sec. The action of
asserting IFC* for at least 100
µ
sec initializes the GPIB and makes the
System Controller Controller-In-Charge (CIC). If switch 2 is also OFF, the
GPIB-PRL will then send the GPIB listen address on switches 4-8.
Switches 4-8 set the GPIB address configuration. If switches 4-8 are on, all
30 possible listen addresses are sent. This is useful if you do not know or
do not care what your GPIB device's primary address is. By sending all
possible listen addresses, the GPIB-PRL is sure to send out the one your
instrument is expecting. This could also be used in a scheme where you
have more than one printer or plotter of the same type producing multiple
copies of a document or drawing. The GPIB-PRL will always assert REN*
when addressing other devices.
