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Chapter 7
Digital Routing
Analog Output Series User Manual
7-2
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Counter 0 Gate Signal
•
Counter 0 Up/Down Signal
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Counter 1 Source Signal
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Counter 1 Gate Signal
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Counter 1 Up/Down Signal
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Master Timebase Signal
You also can control these timing signals with signals generated internally
to the DAQ-STC, and these selections are fully software-configurable. For
example, the signal routing multiplexer for controlling the ao/SampleClock
signal is shown in Figure 7-1.
Figure 7-1.
Signal Routing Multiplexer on Analog Output Devices
Figure 7-1 shows that you can generate the ao/SampleClock signal from a
number of sources, including the external signals RTSI <0..6>, PFI <0..9>,
and the internal signals, Onboard Clock, and Ctr1InternalOutput. Here, the
Onboard Clock is derived by dividing down the ao/SampleClockTimebase
signal.
RT
S
I Trigger <0..6>
PFI <0..9>
a
o/
Sa
mple Clock
On
b
o
a
rd Clock
Ctr1Intern
a
lO
u
tp
u
t