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7-5
Figure 7-4 shows an example of buffered edge counting. Notice that counting begins when the
counter is armed, which occurs before the first active edge on Sample Clock.
Figure 7-4.
Buffered (Sample Clock) Edge Counting
Controlling the Direction of Counting
In edge counting applications, the counter can count up or down. You can configure the counter
to do the following:
•
Always count up
•
Always count down
•
Count up when the Counter 0 B input is high; count down when it is low
For information about connecting counter signals, refer to the
section.
Pulse-Width Measurement
In pulse-width measurements, the counter measures the width of a pulse on its Gate input signal.
You can configure the counter to measure the width of high pulses or low pulses on the Gate
signal.
You can route an internal or external periodic clock signal (with a known period) to the Source
input of the counter. The counter counts the number of rising (or falling) edges on the Source
signal while the pulse on the Gate signal is active.
You can calculate the pulse width by multiplying the period of the Source signal by the number
of edges returned by the counter.
A pulse-width measurement is accurate even if the counter is armed while a pulse train is in
progress. If a counter is armed while the pulse is in the active state, it waits for the next transition
to the active state to begin the measurement.
3
6
3
Co
u
nter Armed
S
OURCE
Sa
mple Clock
(
Sa
mple on Ri
s
ing Edge)
Co
u
nter V
a
l
u
e
B
u
ffer
1
0
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6
3
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2
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