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Manual SDs-01 D  3.2.2003 17:45 Uhr  Seite 3

Example

iCLOCK is synchronized by an external Word 
Clock reference with 44.1kHz. The outputs 
are adjusted to different clock rates (see 
adjacent diagramm). If the external reference 
changes to 48.0kHz, the predefined outgoing 
clock rates will remain unchanged!

The reason is that iCLOCK‘s intelligent synthesis 
process synchronizes every reference signal 
phase-locked and converts it simultaneously 
into the adjusted output clock rates. Thus the 
typical signal distribution effect, »a change 
of input clock rate changes all output clock 
rates«, is prevented in general. The adjusted 
output clock rates are permanently available, 
not depending on the frequency or format of 
the incoming reference!

iCLOCK TECHNOLOGY

Functional Principle

iCLOCK‘s principle operation is completely different to conventional 
products. The customer, as a matter of priority, defines the clock rates and 
formates which are constantly available at the outputs – not depending on 
the incoming reference signals! Limitations regarding defined combinations 
of input and output clock signals do not exist for iCLOCK. All inputs and 
outputs can be routed and combined freely.

33  

Furthermore, unlike standard clock generators, iCLOCK‘s unique concept 
enables to set all system functions during any operation mode. This is 
regardless of whether the synthesizer is synchronized internally or by an 
external source. Doing this, the powerful synthesis process enables additio-
nally, as an outstanding feature, the use of the pull up/down and varispeed 
functions simultaneously! Thus any conceivable adaption of the outgoing 
basic clock rates is possible with iCLOCK.

During this process the system detects automatically useful phase relation-
ships between the reference input and generated output signals. Adjust-
ments aligned to AES11-1997/2003 and EBU R83-1996 will be executed in 
realtime independently.

SoftReLock

SoftReLock is a special system routine executed by the synthesizer in every 
operation mode of reference change or reference resynchronization. 
Especially in cases of the later described SEQSYNC or CYCLESYNC functions, 
SoftReLock guarantees a gradual and seamless synchronization update of 
the internal signal generators, or all iCLOCK output signals respectively, 
to the basic clock rate of a new or reestablished reference source. Also if 
complete different reference types of unequal sources are synchronized 
in succession, e.g. NTSC video after pulled down 48.0kHz AES11, the 
SoftReLock routine ensures interruption-free and gently adjustment of 
iCLOCK‘s output signals to the new reference. 

SoftReLock represents one of the most important functions to support 
the system‘s ability providing continous clock supply under all imaginable 
operation modes. 

Output WCLK

176.4kHz

Functional principle during input reference change

Output WCLK

32.0kHz

Output WCLK

192.0kHz

Output WCLK

44.1kHz

Output WCLK

48.0kHz

Input Reference Change

44.1kHz to 48.0kHz

Содержание iclock

Страница 1: ...REDUNDANT MULTIPLE CLOCK SYNTHESIZER AND VIDEO REFERENCE GENERATOR VERSION 2 23...

Страница 2: ......

Страница 3: ...ranty claim proves to be justified the product will be returned freight prepaid by MUTEC GmbH within Germany Outside Germany the product will be returned with the additional international freight char...

Страница 4: ......

Страница 5: ...Generator 18 Configuring the Word Clock Outputs 20 Configuring the AES EBU Outputs 21 Configuring the S PDIF Outputs 23 Setting System Functions Pull Up Pull Down Varispeed etc 25 Preset Management 2...

Страница 6: ......

Страница 7: ...nals This applies also to external clock frequency changes e g from 44 1kHz to 48 0kHz or reference clock changes e g from video to GPS or AES11 Even if all external references are lost iCLOCK synthes...

Страница 8: ...tion of input assignment at the universal inputs SoftReLock functionality for recurring reference signals CYCLESYNC functionality for automatically re synchronization Drop out compensation of incoming...

Страница 9: ...chaining devices see the Switching off the Termination of the universal Clock Inputs section in the appendix 3 ALARM OUT The iC ALARM output is optionally available item no 8005 065 Refer to the EXTE...

Страница 10: ...nd B this allows for example for a simple documentation of the connected devices 10 RS485 This interface port is provided for programming the iCLOCK and updating the device firmware A software for rem...

Страница 11: ...which may be located on the outside or inside of the device For devices which have no termination of the Word Clock input e g RME Hammerfall with Word Clock i o or Alesis BRC you can use an additional...

Страница 12: ...nch connectors on both ends The specifications stipulate a specific cable resistance of 75 ask your retailer for a confirma tion of this value when purchasing the cables Cables for High Clock Rates Es...

Страница 13: ...R M A T L E V E L T E R M O U T2 4 4 1 k W O R D C L K 2 5 V 7 5 R W C LK S F R E Q F O R M A T L E V E L T E R M O U T3 4 4 1 k W O R D C L K 2 5 V 7 5 R W C LK S F R E Q F O R M A T L E V E L T E R...

Страница 14: ...ging parameter values and not for moving between menu pages 4 When the horizontal arrow has been positioned in front of the parameter to be changed pressing the up down buttons will first change to th...

Страница 15: ...between two externally applied clock signals or an auto matically or manually performed change from an external to an internal clock source or vice versa When the change occurs the LOCK indicator of...

Страница 16: ...ian in charge immediately The message is displayed only if the iCLOCK is equipped with a redundant power supply iCLOCKdp version item no 8015 046 OUTPUTs function Here the set clock rates of all outpu...

Страница 17: ...1id compliant signals can be applied In addition S PDIF signals can be applied to this input and be used for synchronization Refer to the Synchronizable and Generatable Clock Rates section in the appe...

Страница 18: ...deo signal routing The factory default is INTERN INTERN setting INTERNAL links the video generator to the internal reference clock oscilla tor An extraordinary feature of iCLOCK is that the synthesize...

Страница 19: ...ignal In this mode the synthesizer synchronizes to the input video signal to pro vide the output of phase locked audio clock signals FORMAT function FORMAT This function allows for selecting the video...

Страница 20: ...FIELD RATE 48Hz PAL FR setting PAL VIDEO FRAME RATE 25Hz PAL FI setting PAL VIDEO FIELD RATE 50Hz NTSC FRBW setting NTSC VIDEO FRAME RATE 30Hz NTSC FIBW setting NTSC VIDEO FIELD RATE 60Hz 20 NTSC FRC...

Страница 21: ...MC conditions in the studio EMC electromagnetic compatibility Due to the internal signal phase corrections the synthesizer can re lock temporarily when switching AES EBU clock frequencies This does no...

Страница 22: ...te 2 bits 3 4 and 5 of the clear frame signal of the selected AES EBU output pair The factory default is 24BITs 16BITs 18BITs 20BITs 24BITs setting One of four word lengths between 16 and 24Bits are a...

Страница 23: ...TRIBUTION This setting allows for forwarding an input S P DIF or AES3 11 signal to the S P DIF output pair using a hardware bypass As no adjustments can be made in this mode the other functions and pa...

Страница 24: ...g the reference status stored in the channel status bits byte 3 bits 4 5 of the clear frame signal of the selected S P DIF output pair The factory default is LEVEL 3 LEVEL 3 setting With the LEVEL 3 v...

Страница 25: ...well as by instabilities of the synthesizer signal caused by clock source deviation Entering varispeed values and moving the cursor 0 ENTER Enable the varispeed function by pressing the up down cursor...

Страница 26: ...nd a subsequently selected clock source can be selected here FREEZE function FREEZE This function allows for blocking the four cursor buttons This is convenient for protecting the iCLOCK from unauthor...

Страница 27: ...common If a function is edited on any AES menu page any changes will be applied to the same function on the other AES menu page or output The factory default is SINGLE SINGLE setting SINGLE allows for...

Страница 28: ...ersion 1 ON 2 N A one active power supply iCLOCK dp 1 ON 2 ON two active power supplies OK setting The respective power supply is active N A setting NOT AVALABLE This message shows that the respective...

Страница 29: ...n menus OPERATION and NAME Only after this step the choosed setting will be activated GO SURE setting GO enables the setting which is choosed within the function menus OPERA TION and NAME When the ENT...

Страница 30: ...nce more will load the selected preset and reboot the system The number of the selected preset 01 08 will be displayed under NUMBER and the GO parameter will appear If no user input occurs while SHURE...

Страница 31: ...elect one of the PRESET01 08 memories by their preset number or name using the up down keys and confirm by pressing the ENTER key Press the ENTER key twice to switch to the PRESET function Press any u...

Страница 32: ...ANHANG ANHANG ANHANG 88 32...

Страница 33: ...internally or by an external source Doing this the powerful synthesis process enables additio nally as an outstanding feature the use of the pull up down and varispeed functions simultaneously Thus an...

Страница 34: ...3 in same procedure Note If a reference slot is set to NO REF the sys tem skips this slot and synchronizes the next activated slot or the internal video reference generator The system will be locked a...

Страница 35: ...LOCKdp ALARM OUT 3 Loss of the internal reference oscillator Every of the above mentioned operating conditions activate also the red front panel LED ALARM set The relays are normalled when the describ...

Страница 36: ...tions work faultlessly If a disturbance occurs the according relay faills instantly The output contacts supply a max switching power of 30W with 30V 1A DC AC peak The type of the used relays is called...

Страница 37: ...x128 4096 0 5644 8 6144 0 x256 8192 0 11289 6 12288 0 x512 16384 0 22579 2 24576 0 PILOT TONE Clock Rates Type PAL SECAM Hz NTSC Hz Film Hz Color Frame Rate 25 29 97 24 Color Field Rate 50 59 94 48 Bl...

Страница 38: ...ot 3 b conductor cold AES EBU XLR Output AES EBU XLR Input S P DIF Cinch Input Output 1 Audio signal 2 Audio ground 1 2 2 1 AES11 CLOCK RATES Dividers Factors Basic Clock 32 0kHz Basic Clock 44 1kHz B...

Страница 39: ...transfering the video signal of the internal video reference generator simultaneously Two Jumpers are put on two 2 pin sockets J16 and J17 Removing the jumpers from the 2 pin sockets will split up th...

Страница 40: ...ble in pairs Output levels 2 5V p p 75 output impedance 75 3 5V p p 75 output impedance 22 Generatable clock rates 36 audio clock rates 2 DSD clock rates 6 pilot tone clock rates 4 GPS atomic clock ra...

Страница 41: ...Remote controlling of whole system none standard software updating programming power supply Type Internal switching power supply Input voltage 90V 260V automatic adjustment 47Hz 440Hz Power consumpti...

Страница 42: ...PRODUCT NAMES ARE REGISTERED TRADEMARKS OF THEIR RESPECTIVE OWNERS WE RESERVE THE RIGHT TO CHANGE TECHNICAL DETAILS WITHOUT PRIOR NOTICE MUTEC GmbH 2002 7045 014 WWW MUTEC NET DE FON 0049 0 30 746880...

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