Multitone RPR 563GS, Техническое руководство

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RPR 563GS/KGS
TM1187A Issue C Page 3 - 5
15. Output from FL304 is amplified by the first amplifier in IC302 before application to a
second 455kHz filter FL305. The signal is then fed back into IC302 for further
amplification and application to the internal quadrature discriminator.
16. A 90
(
phase shift to the discriminator's second input is provided by L302 and the
demodulated audio is then output at pin 14 where it is split three ways thus:
a) Received audio (RXAUDIO)
b) Sub-Audio Tone decode (TONEX)
c) Data Filter
17. The received audio is fed through de-emphasis network R359, C405, and then to the
high-pass filter TR321. This stage removes low frequency noise from the signal. From
this point the audio signal is fed to the Decoder Board for further amplification and
processing.
Data Filter
18. The data signal passes through a separate de-emphasis network (R360/C404).
Transistor TR353 is an analogue switch which is controlled by the Battery Economy
Circuit (BEC). The data signal is then fed to IC302 pin 15 where it is squared up and
output at pin 16. This open collector output is then fed to the Decoder Board.
Tone Squelch Decoder/Encoder
19. Sub-audio tones are applied to the de-emphasis network R370, C414 before application
to two-pole filter stage TR328/TR329, which has a break frequency of approximately
170Hz. Output is fed to a second two-pole filter, TR331/TR332, thus reducing the
amount of speech content in the signal presented to the Phase Locked Loop (PLL)
IC303, enhancing the tone squelch performance.
20. After filtering, the tone signal is then amplified by IC305. Potential divider R382/383 is
used to set the input amplitude of the signal to IC303 pin 3. When a signal of the
correct frequency is detected, IC303 pin 8 is pulled low; this is the TONE.RX signal
which is supplied to test socket PL302 and to the Decoder Board.
21. The oscillator for the PLL (IC303) runs at twice the tone frequency and is set by RV302.
Tone output from IC303 at pin 5 is fed to Flip-Flop IC304 which divides the tone
frequency by 2. Filtering is provided by two low-pass filter stages TR336 and TR349.
Output is applied to PL302 pin 9 for test purposes, and via potential divider R444/R435
to the modulator driver IC306.