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Applying Power
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2-3
2
ABORT Switch (S1)
When activated by software, the
ABORT
switch can generate an interrupt
signal from the base board to the processor at a user-programmable level.
The interrupt is normally used to abort program execution and return
control to the debugger firmware located in the MVME2603/2604 ROM
and Flash memory. The interrupt signal reaches the processor module via
ISA bus interrupt line IRQ8
∗
. The signal is also available at pin PB7 of the
Z8536 CIO device, which handles various status signals, serial I/O lines,
and counters.
The interrupter connected to the
ABORT
switch is an edge-sensitive circuit,
filtered to remove switch bounce.
RESET Switch (S2)
The
RESET
switch resets all onboard devices; it also drives a
SYSRESET
∗
signal if the MVME2603/2604 is the system controller.
The Universe ASIC includes both a global and a local reset driver. When
the Universe operates as the VMEbus system controller, the reset driver
provides a global system reset by asserting the VMEbus signal
SYSRESET
∗
.
A
SYSRESET
∗
signal may be generated by the
RESET
switch, a power-up
reset, a watchdog timeout, or by a control bit in the Miscellaneous Control
Register (MISC_CTL) in the Universe ASIC.
SYSRESET
∗
remains asserted
for at least 200 ms, as required by the VMEbus specification.
Similarly, the Universe ASIC supplies an input signal and a control bit to
initiate a local reset operation. By setting a control bit, software can
maintain a board in a reset state, disabling a faulty board from participating
in normal system operation. The local reset driver is enabled even when
the Universe ASIC is not system controller. Local resets may be generated
by the
RESET
switch, a power-up reset, a watchdog timeout, a VMEbus
SYSRESET
∗
, or a control bit in the MISC_CTL register.