TRANSCEIVER 800 MHz
MTP700 Portable Radio / Detailed Service Manual
4.2 - 35
ZMY0131006-O
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The only way this makes sense is if you think of the data flow with respect to the radio
WPIC
O
I
O
I
I
SPIB
I
INTERRUPT
I
I
INPUTS
Internal Pulldown
O
Option_Select_2
PTT
I
FLASH
O
I
O
O
I
I
I
I
NU
O
64Mb_SEL
Option_Select_1
O
I
O
NOTE: The register used to receive data (from the DSP) in the WPIC is called
I
SRAM
O
O
SPIA
O
LAYER1 TIMER
EMERGENCY
transmit data to the DSP is called the "Receive Data Register" and has an SRD Pin Name.
I
O
KEYPAD
I
O
O
O
EB1#
I
DISPLA
Y_RS
O
REDCAP2
DNP
as a whole and NOT as a DSP to WPIC serial interface.
a "Transmit Data Register" and has an STD Pin name. The Register used to
I
GCAP3_INT
I
FLASH
I
O
O
A21
GCAP3
O
DNP
SW_1
O
DNP
DNP
O
I
17x17mm BGA
O
I
O
O
O
WR_
14
NU
O
O
O
O
O
13
12
11
15
10
9
8
1
KP_COL4
0
TP314
10
KP_ROW4
12
2
WPIC_STD
15
10
3
11
9
13
11
15
14
7
1
17
ESC_VCO_BUF_EN
19
R306
5
LO_DRIVER_EN
16.8_MCU
0
1
WPIC_OSC_EN
0
R304
XYD5
T8
XYD6
N8
XYD7
M6 L10
XYD8
M9
XYD9
C4
XZYR
W
XYSEL
B5
B4
XYST
M1
1
XYD1
1
N9
XYD12 XYD13
T9 R9
XYD14 XYD15
P9
XYD2
M5
XYD3
P8
XYD4
R8
A2
XY
A5
A1
XY
A6
C2
XY
A7
XY
A8
C3
XY
A9
D1
XYD0
R7
XYD1
T7
M10
XYD10
XY
A1
1
D3
XY
A12
E2 E1
XY
A13
XY
A14
E3 E4
XY
A15
B3
XY
A2
B2
XY
A3
A3
XY
A4
C7
TOUT8 B7
TOUT9
TRST
H14
TXA_TDO G15
K11
TXB
A4
XY
A0
D4
XY
A1
XY
A10
D2
E7
TOUT14 E8
TOUT15
TOUT2
D5
TOUT3
C6
TOUT4
B6
TOUT5 A6
TOUT6 D6
TOUT7
D7
TEST
G16
TMS
H12
TOUT0 A5
TOUT1
C5
B8
TOUT10 A8
TOUT11 D8
TOUT12 E6
TOUT13
SRDB B14
B12
SRDB2
STDA
D16
STDB
A14
STO
T13
TCK
H13
TDI
G12
TDO
F12
B10 SPICS2B
SPICS3A
E9
A10
SPICS3B
SPICS4A
F7
SPICS4B
E12
SPI_CKA
A9
D11
SPI_CKB
SRDA
D13
SIMRESET
T12
SIZ0
F15
SIZ1
F14
SPICS0A
D9
D10
SPICS0B
SPICS1A
E11
C10 SPICS1B
SPICS2A
E10
SC2A
A15
SC2B
C14
SCKA
C15
SCKB C13
A12
SCKB2
P12
SENSE
SIMCLK
N1
1
SIMDA
TA
N12
K12
RTSB
RW
M2
RXA_IC1_TDI G14
J12
RXB
B16 SC0A
SC0B B13
SC1A
A16
SC1B
A13
ROW1 K13
ROW2
K14
ROW3
K15
ROW4
J14
J15
ROW5_IC2B
ROW6_DCD_SC2A_DSP_DE
J16
ROW7_RI_SCKA_TCK
J13
RTSA_IC2A_RESET_IN G13
E15
PS
TAT
1
PS
TAT
2
D14
PS
TAT
3
D15
PVCC
T10
T1
1
PWR_EN
RESET_IN R13
RESET_OUT P13
ROW0 L15
MOSIA
C9
D12
MOSIB
MUX_CTL
F16
OE
M1
N10
P1GND
PCAP
R10
PGND P10
PS
TAT
0
E13
INT4
M16
INT5
M14
INT6_DSR_STDA_TRST
M13
INT7_DTR_SCLK_SRDA_TMS
L14
H1
1
MCU_DE
MISOA
B9
C11
MISOB
MOD
R12
DSP_DE
G1
1
DSP_IRQ
C12
EB0
K1
EB1
J3
N16
INT0 INT1
N15
INT2
N14
INT3
M15
D2
T3
R3
D3
D4
P3
D5
T4
D6
R4
D7
P4
D8
P5
D9
N5
D0
T1
T2
D1
D10
P6
D11
R6
D12
T6
D13
N6
D14
N7
D15
P7
CS0
N3
CS1
N2
CS2
P2
CS3
R2
CS4
P1
CS5
R1
CTSA_MCU_DE
F13
L12
CTSB
COLUMN0
N13
COLUMN1
R14
COLUMN2 R15
COLUMN3 T14
COLUMN4
R16
COLUMN5
P16
COLUMN6_OC1
P15
COLUMN7
P14
ADDR6
H6
ADDR7
G6
ADDR8
H5
ADDR9
G5
CKIH K4
K2
CKIL
CKO
M3
CKOH
L2
ADDR18
F4
ADDR19
F1
J4 ADDR2
ADDR20
F2
ADDR21
F3
L5
ADDR3
ADDR4
K6
ADDR5
J6
ADDR10
F5
ADDR11
H4
H1
ADDR12
ADDR13
H2
ADDR14
H3
E5 ADDR15
ADDR16
G3
ADDR17
G4
2
30C40
U301-1
ADDR0
J2
ADDR1
J1
R313
3
8
SPIB_MOSI
39K
18
5
5
20
6
PA_BIAS
RESET_OUT
6
16
3
4
5
6
WPIC_FSYNC
12
14
13
SIDE_OPT_SEL1
SW_2
SPIB_CS2_GCAP3
TP315
TP332
_EN
BA
T_DA
TA_IN
TP330
TP335
0.1uF
C302
TP333
0
R301
R300
0
TP303
20
TP301
WPIC_TXE
R310
KP_ROW3
GCAP3_FSYNC
5
V3_2.775V
0
12
8
MOD
3
C303
4
SPIA_CS_PA_BIAS
.01uF
39K
R302
KP_ROW1
ANT_EN
R307
V3_2.775V
0
HEADSET_KEYF
AIL
0
R305
S_EN
0
R303
VPP
A4
TP313
1
EN_RP
B4 EN_WE
B3
A5
EN_WP
GND1
E8
GND2
F1
NC1
C4
VCC
F5
VCCQ
E1
DQ4
F4
D3
DQ5
DQ6 E3
DQ7 F2
DQ8
D6
DQ9
E6
EN_CE
D7
EN_OE
F8
DQ10
F6
DQ11
D4
DQ12 E4
DQ13 F3
DQ14
D2
DQ15
E2
DQ2
D5
DQ3
E5
A4
A8
A5
B7
A6
C6
A7
A7
A8
A3
A9
C3
DQ0 E7
DQ1 F7
A15
C1
A16
D1
A17
B6
A18
B5
A19
A6
A2
B8
A20
C5
A3
C7
A0
D8
A1
C8
A10
B2
A11
A2
A12
C2
A1 A13
A14
B1
U303
28F320C3
1
3
TP320
.01uF
C305
SIDE_TX
SIDE_CTS
R325
0
SIDE_RTS
TP311
SW_1
SOFT_TURN_OFF
SIDE_RX
R324
39K
TP308
EXT_SPKR_SEL
BA
T_DA
TA_PULL_UP
TP307
RX_ACQ
SPIB_CLK
21
0
TP305
R320
TP302
21
SW_8
0
TP300
E302
SW_4
DISPLAY_RS
SPIB_CS1_DISPLAY
VIBRATOR
BAT_DATA_OUT
SPIA_CS2_ODCT
18
1
LV_DETECT
TX_DETECT
13
16
SPIA_MISO
17
SPIA_CS1_ESCORT
GCAP3_STANDBY
GCAP3_DCLK
TP334
9
GCAP3_INT
0
SPIB_MISO
11
2
KP_COL1
16.8_MHz_CLK
SPIA_CS0_WPIC
KP_ROW2
SPIA_CLK
3
19
TP321
KP_COL2
IDLE
0
R309
TP319
TP306
39K
R308
TP316
EMERGENCY
10uF
C306
R323
0
0
R321
TETRA_MAIN_VCO_ON
0
R322
TP312
R312
TP304
OPT_SEL_1
47
8
5
4
PTT
OPT_SEL_2
6
7
4
WPIC_TXCLK
WPIC_SRD
TP322
SIDE_OPT_SEL2
KP_COL3
10
KP_ROW0
4
GCAP3_AD_TRIGGER
7
AUDIO_PA_ENABLE
KP_COL0
2
4
GCAP3_RX
GCAP3_TX
2
SYNT_CS_
6
9
SPIA_MOSI
22K
R314
6800pF
C304
32KHz_CLK
7
MEM_CNTL(6:1)
MEM_CNTL(6:1)
HST_DATA(0:15)
HST_DATA(0:15)
MUX_CTRL
14
15
V3_2.775V_FLTR
DSP_2
DSP_3
DSP_5
DSP_4
HST_Addr(0:21)
HST_Addr(0:21)
RS232_DSR
RS232_DTR
DSP_1
PWM1_1.8V_FLTR
RS232_RI
RS232_TX
RS232_RTS
RS232_RX
RS232_CTS
RS232_DCD
TP331
8 Mb
64 Mb
4 M x 16
Controller Memory Schematic Diagram (Redcap 2) sheet 1 of 2
Содержание IMPRES Tetra MTP700
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