4.2 - 6
MTP700 Portable Radio / Detailed Service Manual
TRANSCEIVER 800 MHz
Block Diagrams Description
The block diagrams description cover Receiver Path, Transmitter Path, Frequency Gen-
eration Section and Digital Section.
Receiver Path
The received signal (see Figure 4.2-2) from the antenna is directed by the Antenna
Switch to the Front End Filter
Figure 4.2-2 Receive Path - Block Diagram
The Front End Filter, which defines the receive frequency range, blocks the half IF and
image frequency entry, and reduces the RF oscillator leakage. The signal is mixed with
the local oscillator (high-side) to create the first IF at 109.65 MHz. The signal is filtered by
the crystal filter and sent to the WPIC ASIC.
The WPIC performs down conversion to baseband frequency (0 Hz) and converts the
baseband analog signals into digital-in-phase (I) and quadrature (Q) formats. This data is
sent for further processing to the Digital Signal Processor (DSP) (part of RedCap2) over
the Synchronous Serial Interface (SSI) data links.
The DSP performs: the demodulation, Forward Error Correction (FEC) and other correc-
tion algorithms for overcoming channel errors, and decoder procedure for digital speech
data decompression.
Limiter
Baseband
Filter
A/D
Divide
by 2
Redcap2
(DSP)
GP06
GP05
WPIC
I=13mA
From
TETRA
Main VCO
Balun
XTAL
IF
Filter
109.65MHz
IL=2.5dB
SAW Filter
IL=2dB
SAW Filter
IL=2dB
Integrated
LNA
Gain=15dB
I=7.5 mA
Mixer
CG=3.0dB
I=5.0mA
LO Level=
-2 to -4 dBm
TETRA
AntSW
IL=0.7dB
From
TETRA
TX
From
VCNTO
pin of
WPIC
From
GP05
WPIC
From
GP06
WPIC
From
2
nd
LO
SSI
Содержание IMPRES Tetra MTP700
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