12
8575
8575
A N/B Maintenance
A N/B Maintenance
1.2.2 System Frequency
1.2.2.1 System frequency synthesizer_ICS952001
Programmable Timing Control Hub™ for P4™ processor
General Description :
The ICS952001 is a two chip clock solution for desktop designs using SIS 645/650 style chipsets. When
used with a zero delay buffer such as the ICS9179-06 for PC133 or the ICS93705 for DDR applications it
provides all the necessary clocks signals for such a system.
The ICS952001 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing
Control Hub). ICS is the first to introduce a whole product line which offers full programmability and
flexibility on a single clock device. Employing the use of a serially programmable I2C interface, this device
can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal
spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock.
TCH also incorporates ICS's Watchdog Timer technology and a reset feature to provide a safe setting under
unstable system conditions. M/N control can configure output frequency with resolution up to 0.1MHz
increment.
