Midas RTE-V821-PC, Руководство пользователя

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RTE-V821-PC USER’ S MANUAL
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3.4. SWITCH2 (SW2)
SW2 is a switch for general-purpose input ports. When a switch contact is open, it
corresponds to 1. When it is closed, it corresponds to 0. See Section 6.1.2 for details.
3.5. LED
The LEDs are used to indicate statuses, as listed below.
LED Description
CS0 Lights when the CS0 pin of the CPU is active (low).
CS1 Lights when the CS1 pin of the CPU is active (low).
CS2 Lights when the CS2 pin of the CPU is active (low).
CS3 Lights when the CS3 pin of the CPU is active (low).
TOVER Lights when a time-out occurs.
P06 PIO: PORT0-6
P07 PIO: PORT0-7
LED Indication
3.6. TEST PINS (TP)
Test pins are used to connect a ROM in-circuit debugger. Some of them accept control
signals from the ROM in-circuit debugger, and the others output trace timing signals. The
following table lists the signal name and function related to each test pin.
Signal Input/
output
Function
RESET- Input When a low level is supplied to this test pin, the CPU is reset. A
reset request signal from the ROM in-circuit debugger is
connected to the test pin. The test pin is pulled up with 1k
Ω
.
NMI- Input When a low level is supplied to this test pin, an NMI signal is
given to the CPU. This signal can be masked by software. An
NMI request (break request) signal from the ROM in-circuit
debugger is connected to the test pin. The test pin is pulled up
with 1k
Ω
.
RD_WR_ALL- Output This signal is obtained by ORing (negative logic) the CPU's
UMWR-, LMWR-, MRD-, IOWR-, and IORD- signals. It is used
as a trace timing signal by the ROM in-circuit debugger.
GND ------- This test pin is at a ground level. The ground level of the ROM
in-circuit debugger is connected to the test pin.
Test Pin Functions
3.7. SUBPORT (JSUBPORT)
The JSUBPORT connector makes some CPU pins accessible to the outside. Its pin
arrangement is shown below. The pins of the JSUBPORT connector are defined in the
following table.
2
1 3
4
5
6
7
8 20
19
18
17
16
15
14
13
12
11
10
9
JSUBPORT Pin Arrangement