MicroSys miriac EK5744, Руководство пользователя

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Interfaces 6
miriac EK-5744 User Manual V 1.2 44/53
© MicroSys Electronics GmbH 2017
6.6.3.2 Output Truth Table
The “X” denotes this field is not relevant for the current output, however the
corresponding output can be tested to stay inactive in both states of the bit.
PWENA# PWENB# PWENC# PWEND# DOUT0 DOUT1 DOUT2 DOUT3 First Stage Outputs
1 1 1 1 X X X X off all off
0 1 1 1 X X X X off all off
1 0 1 1 X X X X off all off
0 0 1 1 0 0 0 0 on all off
0 0 1 1 1 0 0 0 on Out0 = ON
0 0 1 1 0 1 0 0 on Out1= ON
0 0 1 1 0 0 1 0 on Out2 = ON
0 0 1 1 0 0 0 1 on Out3 = ON
1 1 0 1 X X X X off all off
1 1 1 0 X X X X off all off
1 1 0 0 0 0 0 0 on all off
0 0 0 0 0 0 0 0 on all off
1 1 0 0 1 0 0 0 on Out0 = ON
1 1 0 0 0 1 0 0 on Out1= ON
1 1 0 0 0 0 1 0 on Out2 = ON
1 1 0 0 0 0 0 1 on Out3 = ON
Table 6-14: Digital Output Truth Table
6.6.3.3 Digital Settling Times
The digital output circuitry contains settling times in the first stage unit. For a cor-
rect status read-back of the first stage switches, the following settling times must
be observed.
PWENA/B# DPWSTA/B Settling Time Description
1->0 1->0 >200us First Stage Turn On Delay
0->1 0->1 >40ms First Stage Turn Off Delay
Table 6-15: Digital Outputs First Stage Settling Times