Micros Systems Workstation 5, Руководство по обслуживанию

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2-6 Workstation 5 Field Service Guide
Workstation 5 System Board Technical Descriptions
LX800 Processor and TFT Controller
GeodeLink Memory Controller
The GeodeLink Memory Controller provides all of the LX800 memory needs.
The GLMC is capable of handling multiple requests for memory data from the
CPU core, the Graphics Processor, the Display Controller and the external PCI
bus via the GeodeLink Interface Units (GLIUs). Contention for memory
bandwidth between the various modules is minimized by extensive buffering
logic.
Because the GLMC supports the memory requirements of both the CPU core
and display sub-system, it is classified as a Unified Memory Architecture
(UMA) subsystem.
• The 64-bit DDR SDRAM Interface as implemented on the LX System
Board, supports unbuffered DDR 333/400 DIMMs up to 2GB.
• Unified Memory Architecture (UMA), UMA enables up to 2GBps memory
bandwidth while using single memory interface. The DDR Memory array
contains both the main system memory and the graphics frame buffer.
GeodeLink Control Processor
The GeodeLink Control Processor is used for software debugging and
performance analysis.
GeodeLink PCI Bridge
The GeodeLink PCI Bridge (GLPCI) module provides the PCI interface for the
LX800 system. It is comprised of five major sections or blocks, briefly
described below.
GeodeLink Interface Block
The GeodeLink Interface Block provides a conversion layer between the
GeodeLink Interface Unit 1 (GLIU1) and the Transaction Forwarding
Block.
FIFO/Synchronous Block
The FIFO module consists of a group of in-bound and out-bound FIFOs.
Each FIFO provides a simple, synchronous interfaces to read and write
requests.
Transaction Forwarding
The Transaction Forwarding block receives, processes and forwards
transaction requests and responses between the GeodeLink Interface and
PCI Bus Blocks. Transaction ordering rules are implemented and write
gathering and read pre-fetching are performed as required.