Micron NetFRAME 2100 Series, Руководство по эксплуатации продукта

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Each Pentium II processor is packaged in a Single Edge Contact (S.E.C.) cartridge. The cartridge
includes the processor core with an integrated 16 KB primary (L1) cache; the secondary (L2) cache; a
thermal plate; and a back cover.
The processor implements the MMX™ technology and maintains full backward compatibility with the 8086,
80286, Intel386™, Intel486™, Pentium, Pentium Pro and Pentium II processors. The processor’s numeric
coprocessor significantly increases the speed of floating-point operations and complies with ANSI/IEEE
standard 754-1985.
Each processor cartridge connects to the system board through a 242-pin edge connector. The cartridge
is secured by a retention module attached to the system board. Depending on configuration, your system
may have one or two processors.
The processor external interface is MP-ready and operates at 100 MHz. The processor contains a local
APIC section for interrupt handling in MP and UP environments.
The second-level cache is located on the substrate of the S.E.C. cartridge. The cache includes burst
pipelined synchronous static RAM (BSRAM). The L2 cache is offered in 512 KB configurations only, with
error correcting code (ECC) that operates at half the core clock rate.
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Only 100 MHz PC/100 ECC SDRAM is supported by the system board. Memory is partitioned as four
banks of SDRAM DIMMs, each providing 72 bits of noninterleaved memory (64-bit main memory plus
ECC):
•
Install from 32 MB to 1 GB of memory, using registered DIMMs.
•
Install from 32 MB to 512 MB of memory, using unbuffered DIMMs.
Memory should be added in order from slot 1 to slot 4.
✏
NOTE
Do NOT mix registered and unbuffered memory. Non ECC memory maybe
installed but is not recommended. Mixing Non-ECC memory and ECC
memory causes all ECC features to be disabled.
Dual address strobe (RAS) signals are provided for each DIMM. When single-banked DIMMs are used,
one of the RAS lines is connected to both 36-bit “halves” of the DIMM. When double-banked DIMMs are
used (known as Dual RAS), both RAS lines are connected to two 36-bit “quarters” of the DIMM.
System memory begins at address 0 and is continuous (flat addressing) up to the maximum amount of
DRAM installed (exception: system memory is noncontiguous in the ranges defined as memory holes
using configuration registers). The system supports both base (conventional) and extended memory.
•
Base memory is located at addresses 00000h to 9FFFFh (the first 640 KB).
•
Extended memory begins at address 0100000h (1 MB) and extends to FFFFFFFFh (4
GB), the limit of addressable memory. The top of physical memory is a maximum of 1 GB
(to 3FFFFFFFh).