Table 31. BootCfg Register (0x1B)
Table 32. PinStat Register (0x1C)
ADDRESS:
0x1B
MODE:
Read-Only
BIT
7
6
5
4
3
2
1
0
NAME
PwrRstCfg[
3
:0]
SftRstCfg
BootDly
[1:0]
ChgAlwTry
PwrRstCfg
[
3
:0]
See Table 1
SftRstCfg
Soft Reset Register Default
0 = Registers do not reset to default values on soft reset
1
= Registers reset to default values on soft reset
BootDly[
1
:0]
Reset Delay Control (see Figure 2a, 2b)
00 = 80ms
01 = 120ms
10 = 220ms
11 = 420ms
ChgAlwTry
UVLO Automatic Retry
If SYS UVLO condition occurs during boot process:
0 = Part latches off until CHGIN is removed and replaced
1 = Part retries after delay
ADDRESS:
0x1C
MODE:
Read Only
BIT
7
6
5
4
3
2
1
0
NAME
ILim_T[2:0]
-
PFN1
PFN2
MPC1
MPC0
ILim_T[2:0]
Monitor of The Input limiter Current Setting
000
= Input Limiter Off
001
= 100mA
010
= 500mA
100
=1A
PFN1
PFN1 Input State
0 = pin low
1 = pin high
PFN2
PFN2 In/Out State
0 = pin low
1 = pin high
MPC1
MPC1 Input State
0 = pin low
1 = pin high
MPC0
MPC0 Input State
0 = pin low
1 = pin high
MAX20335
PMIC with Ultra-Low I
Q
Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com
Maxim Integrated
│
60