Power Sequencing
There are multiple configuration options for the sequenc-
ing of the buck regulators and LDOs during power-on. See
for details. Regulators can be configured to turn
on at one of the four points during the power-on process:
0% t
RST
, 25% t
RST
, 50% t
RST
, and 100% t
RST
. The reset
delay t
RST
can be set to 80ms, 120ms, 220ms, or 420ms
by BootDly[1:0] in the BootCfg register. The power-on
sequencing is depicted in
.
Additionally, the regulators can be selected to default off
and can be turned on with an I
2
C command after
RST
is
released. Each LDO regulator can be configured to be
always-on as long as SYS or BAT is present.
In general, if an undervoltage condition is detected on
SYS the device goes into the off state. However if there
is a valid voltage on CHGIN the behavior is determined
by the ChgAlwTry setting. If ChgAlwTry = 0, and an
undervoltage condition is detected on SYS during the
sequencing process the device turns SYS and all other
external resources off and waits for CHGIN removal. On
CHGIN removal the device enters the off state to avoid
draining the battery. If ChgAlwTry = 1, the process will
continually recheck the SYS undervoltage condition every
500ms until it is no longer vaild before continuing with the
sequencing process.
Figure 2a. Power-On Sequencing
MAX20335
PMIC with Ultra-Low I
Q
Voltage Regulators and
Battery Chargers for Small Lithium Ion Systems
www.maximintegrated.com
Maxim Integrated
│
30
001
010
SYS
POR
RST
15ms
011
100
111
t
RST
BUCK
CANNOT BE
ALWAYS ON
30ms
5ms
30ms
15ms
CHGIN INSERTION
OR
KIN
PRESS*
LDO_En
BUCK_En**
CHGIN INSERTION
KIN
PRESS
_Seq
0%
25%
50%
100%
% OF t
RST
ALWAYS-ON
*
KIN
PRESS TURN-ON ENABLED VIA SPECIFIC PwrRstCfg ONLY
**AFTER BEING ENABLED, THE BUCK CONVERTERS HAVE AN 8ms (TYP) BLANKING TIME BEFORE THE OUTPUT VOLTAGE STARTS TO RISE.
ENABLE VIA
I
2
C/MPC
ENABLE VIA
I
2
C/MPC