Matrox Solios eV-CL, Установка и справочник по оборудованию

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Matrox Solios eV-CL acquisition section 59
period, take the inverse of the timer’s clock frequency. For example, if the clock
frequency is 12.27 MHz, the minimum pulse width is 2 x 1/12.27 MHz
(approximately 163 nsec).
To grab upon a trigger, use the MIL-Lite function MdigControl() with
M_GRAB_TRIGGER_STATE
*
. To output a timer signal upon a trigger, use
MdigControl() with M_TIMER_TRIGGER_SOURCE .
Synchronization
For each PSG in Matrox Solios eV-CLBL and Matrox Solios eV-CLFL the board
can supply one horizontal (HSYNC) and one vertical (VSYNC) synchronization
signal to the video source. Through the Camera Link connectors, the board also
receives synchronization data (frame valid, line valid, and data valid) along with
the video data; refer to the Camera Link specification for a description of the
synchronization data.
Note that the Camera Link standard does not regulate how to transmit an
interlaced video signal; however, you can define an auxiliary signal as a field
polarity input signal and transmit the field polarity on this signal.
Clock
For each PSG in Matrox Solios eV-CLBL and Matrox Solios eV-CLFL, the board
can supply a clock signal to the video source. Through each of the video input
Camera Link connectors, the board can also receive a clock signal.
*. As of MIL 10.