186
HPSW
Control signal to swith HF signal
path
HSYNC
Horizontal synchronization output
I2C_DAC
Control signal to enable/disable the
I2C bus to the DAC PCB
INT
Interrupt request
KAR_BY_PASS
Karaoke bypass control signal from
Sti5505 to AV board.
LD-CD
CD laser out
LD-DVD
DVD laser out
LLD_MUTE
LossLess Decoder Mute, if "1" mute
indication from audio interface
LRCLK
PCM Left/Right clock (word clock) to
AV board
LRCLK_AV
PCM Left/Right clock (word clock) to
AV board
LRCLK_FUR
PCM Left/Right clock (word clock) to
the FURORE
LRCLKO
PCM Left/Right clock (word clock)
output from STI5505
MON1
CD laser monitor
MON2
DVD laser monitor
MOTO1
Motor control signal
MUTE
Mute control signal
MUTE_AV
Mute control signal to AV board
MUTE_DET
Mute detection, mute 0x69 for all
channels detection
O[4:1]
Servo current outputs for focus
control
O-CENTRAL
Testpin for offset cancelation
OEND
DRAM output enable
OSLINKIN
Control port P3 I/O to Sti5505
OSLINKOUT
Control port P3 I/O from Sti5505
OTD-HD61
Off track detection
P50
Bi-directional interface used for
communication between video
equipment
PCM_CELF_FUR
I2S center/subwoofer serial data line
PCM_CLK_FUR
Audio system clock to FURORE
PCM_CLK_ST
Audio system clock to STI5505
PCM_LERI_FUR
I2S left right data line to the
FURORE
PCM_LSRS_FUR
I2S left/right surround serial data line
PCM_OUT0
I2S audio serial data out of the
STI5505
PCMCLK_AV
I2S audio system clock to A/V PCB
PCMOUT_AV
I2S audio serial output data to A/V
PCB
PLAY
If "1" Fade circuit is in LLD mode,
indication output
PLL_LOCK
Indication that PLL is in lock
PLL_SYNC
Sector sync found indication
POR
Power on reset
PORN
Power on reset active low
PROG_CLK384
Clock divided from 384*Fs =
16.9344 Hz
PROG_CLKSYS
Clock divide from system clock
PSENn
Program strobe enable (Servo)
PSP
Pit Signal Processing
PSP_ENABLE
If "1" PSP circuit is active, indication
output
PWR_FAIL
Power fail control signal from PSU
R_OUT
Video output Red from Sti5505
R_VID
Buffered video output Red to A/V
board
RA
Radial actuator control signal from
servo processor to power driver
RAC-SW
Radial control switch
RAD-
Radial actuator negative connection
RAD+
Radial actuator positive connection
RAMAD[14:0]
RAM memory address bus (Servo)
RAMDA[7:0]
RAM memory data bus (Servo)
RAMRW
RAM memory read/write control
signal (Servo)
RAS[1:0]ND
DRAM row address strobe
RASN
SDRAM row address strobe
RDI
Read enable input of HD61
REFCOS
Position Control Sledge external
cosine offset compensation/stepper
motor cosine output
REFSIN
Position Control Sledge external
sine offset compensation/stepper
motor sine output
RESET_I2C
Reset I2C
Rfo
Amplified HF signal to HD61
RFP
Amplified HF signal for PSP
recognition
RSTN
System reset
RTS_SER
Ready to send control signal of
service serial interface
RWN
Read/Write control signal (EMI)
RXD_BE
Receive data of basic engine serial
interface (S2B)
RXD_SER
Receive data of service serial
interface
S[2:1]
Servo current outputs for radial
tracking
SACD_CLK
SACD clock 16.394 MHz, CLK
source of the system
SCART[1:0]
Scart control signals: slow blanking
SCL
I2C bus clock
SCL_DAC
I2C bus clock to DAC PCB
SCLK
PCM I2S serial bit clock
SCLK_AV
PCM I2S serial bit clock to A/V PCB
SCLK_FUR
PCM I2S serial bit clock to the
FURORE
SCLKo
PCM I2S serial bit clock output from
Sti5505
SDA
I2C bus data
SDA_DAC
I2C bus data to DAC PCB
SEL_ACLK1
Select audio clock 1
SEL_ACLK2
Select audio clock 2
SERVICE
Control signal of service serial
interface
SICL
Serial interface clock input
SIDA
Serial interface data input
SILD
Serial interface load
SINPH
Position control sledge in
SL
Sledge actuator control signal from
servo processor to power driver
SL-
Sledge actuator negative
connection to sledge motor
SL+
Sledge actuator positive connection
to sledge motor
SPDIF_AV
Digital audio to the A/V PCB
SPDIF_FUR
Digital audio to the FURORE
SPDIF_OUT
Digital output from STI5505
SSM_ACT
Indication new frame is being
transmitted
ST_CLK
STI5505 system clock
ST_TDI
Boundary scan test data input to
STI5505
STB_CONT
Standby control signal to power
supply
STB_CONTD
Delayed standby control signal -
enable or disable the clocks
STB_MUTE
Standby control signal mute
STB_OUT
Standby control signal to DAC PCB
STBY
Standby
SUR
Servo Unit Ready to accept data
(S2B0
T[3:1]
Tacho control signals from HD61 to
turntable motor driver
TCK
Boundary scan test clock
TDI
Boundary scan test data input
TDO
Boundary scan test data output
TMS
Boundary scan test mode select
TRAY1
Tray motor control signal 1 from
servo processor to power driver
Содержание SA-12S1
Страница 46: ...44 Personal notes...
Страница 58: ...Layout AV Board N Europe to p view CL 06532152_064 eps 121200 67 68...
Страница 59: ...Layout AV Board N Europe bottom view CL 06532152_065 eps 121200 69 70...
Страница 62: ...Layout AV Board F S U top view CL 06532152_105 eps 151200 75 76...
Страница 63: ...Layout AV Board F S U bottom view CL 06532152_104 eps 181200 77 78...
Страница 80: ...Layout Mono board Part 1 top side CL 06532152_85a eps 121200 111 112...
Страница 81: ...Layout Mono board Part 2 top side Cl 06532152_85b eps 121200 113 114...
Страница 82: ...Layout Mono board Part 3 top side CL 06532152_85c eps 121200 115 116...
Страница 84: ...Layout Mono board Part 1 bottom side CL 06532152_86a eps 121200 119 120...
Страница 85: ...Layout Mono board Part 2 bottom side CL 06532152_86b eps 121200 121 122...
Страница 86: ...Layout Mono board Part 3 bottom side CL 06532152_86c eps 121200 123 124...