S
ERIAL
I
NTERFACE
D
EVELOPERS
G
UIDE
Appendix B - Xilinx Register/Data Structure
/* Xilinx FPGA Register Map Structure */
typedef struct
{
UWord16
OpCtrlRegLo; /*
Map
to
0x4X00
*/
UWord16
OpCtrlRegHi; /*
Map
to
0x4X01
*/
UWord16
UserCtrlReg; /*
Map
to
0x4X02
*/
UWord16
StaticCtrlReg;
/* Map to 0x4X03 */
UWord16
ImgHistoGrabReg;
/* Map to 0x4X04 */
UWord16
InterruptReg;
/* Map to 0x4X05 */
UWord16
Spare0Reg;
/*
Map
to
0x4X06
*/
UWord16
AtcOffsetCoefReg;
/* Map to 0x4X07 */
UWord16
Reserved0[8];
/* Map to 0x4X08 - 0x4X0F */
UWord16
Reserved1[16];
/* Map to 0x4X10 - 0x4X1F */
UWord16
ProgSyncRegLo;
/* Map to 0x4X20 */
UWord16
ProgSyncRegHi;
/* Map to 0x4X21 */
UWord16
DspHorCntPreReg;
/* Map to 0x4X22 */
UWord16
DspHorImgStartReg;
/* Map to 0x4X23 */
UWord16
DspHorImgStopReg;
/* Map to 0x4X24 */
UWord16
DspVerCntPreReg;
/* Map to 0x4X25 */
UWord16
DspVerImgStartReg;
/* Map to 0x4X26 */
UWord16
DspVerImgStopReg;
/* Map to 0x4X27 */
UWord16
FpaSyncDlyRegLo;
/* Map to 0x4X28 */
UWord16
FpaSyncDlyRegHi;
/* Map to 0x4X29 */
UWord16
FpaHorStartReg;
/* Map to 0x4X2A */
UWord16
FpaHorStopReg;
/* Map to 0x4X2B */
UWord16
FpaHorTermCntReg;
/* Map to 0x4X2C */
UWord16
FpaVerStartReg;
/* Map to 0x4X2D */
UWord16
FpaVerStopReg;
/* Map to 0x4X2E */
UWord16
FpaVerTermCntReg;
/* Map to 0x4X2F */
UWord16
FpaHorRoiStartReg;
/* Map to 0x4X30 */
UWord16
FpaHorRoiStopReg;
/* Map to 0x4X31 */
UWord16
FpaVerRoiStartReg;
/* Map to 0x4X32 */
UWord16
FpaVerRoiStopReg;
/* Map to 0x4X33 */
UWord16
Reserved2[12];
/* Map to 0x4X34 - 0x4X3F */
UWord16
Reserved3[16];
/* Map to 0x4X40 - 0x4X4F */
UWord16
Reserved4[16];
/* Map to 0x4X50 - 0x4X5F */
UWord16
Reserved5[16];
/* Map to 0x4X60 - 0x4X6F */
UWord16
FpgaProgReg; /*
Map
to
0x4X70
*/
UWord16
Reserved6[15];
/* Map to 0x4X71 - 0x4X7F */
UWord16
NucMemDatAcc;
/* Map to 0x4X80 */
UWord16
NucMemDatAccInc;
/* Map to 0x4X81 */
UWord16
MarNucMem;
/*
Map
to
0x4X82
*/
UWord16
NucTableBaseReg;
/* Map to 0x4X83 */
UWord16
FpaIntegRegLo;
/* Map to 0x4X84 */
UWord16
FpaIntegRegHi;
/* Map to 0x4X85 */
UWord16
FpaSerCtrlWord0Reg;
/* Map to 0x4X86 */
UWord16
FpaSerCtrlWord1Reg;
/* Map to 0x4X87 */
UWord16
FpaSerCtrlWord2Reg;
/* Map to 0x4X88 */
UWord16
FpaSerCtrlWord3Reg;
/* Map to 0x4X89 */
UWord16
FpaSptDac0Reg;
/* Map to 0x4X8A */
UWord16
FpaSptDac1Reg;
/* Map to 0x4X8B */
UWord16
FpaSptDac2Reg;
/* Map to 0x4X8C */
UWord16
FpaSptDac3Reg;
/* Map to 0x4X8D */
UWord16
Reserved7[2];
/* Map to 0x4X8E - 0x4X8F */
UWord16
Reserved8[16];
/* Map to 0x4X90 - 0x4X9F */
/* Utility Memory Access via MAR A */
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