S
ERIAL
I
NTERFACE
D
EVELOPERS
G
UIDE
ERR_CAM_SPRT_BD_MISMATCH,
ERR_SUBCODE_UNDEFINED
};
ErrorCount: a count of the total number of errors since boot.
ErrorData [0] Value stored in configuration flash.
ErrorData [1] Value read from the ADC.
ErrorData [2] – [4] Not used.
6.6.2 FPGA Load
This error is set during the configuration of the Xilinx FPGA.
Data from CameraConfig.camErrors:
ErrorCode: ERR_FPGA_LOAD define.
ErrorSubCode: a more specific description of the error from the following enumeration.
/* FPGA Load Error SubCodes (#define ERR_FPGA_LOAD 0x8002) */
enum
{
ERR_FPGA_LOAD_UNDEFINED = 0,
ERR_FPGA_NOT_DONE
};
ErrorCount: a count of the total number of errors since boot.
ErrorData [0] – [4] Not used.
6.6.3 FPGA Test
This error is set during the testing of the Xilinx FPGA registers.
Data from CameraConfig.camErrors:
ErrorCode: ERR_FPGA_TEST define.
ErrorSubCode: a more specific description of the error from the following enumeration.
/* FPGA Test Error SubCodes (#define ERR_FPGA_TEST 0x8003) */
enum
{
ERR_FPGA_TEST_UNDEFINED = 0,
ERR_WALKING_0_1,
ERR_CROSSTALK,
ERR_FPGA_MEMORY
};
ErrorCount: a count of the total number of errors since boot.
For SubCode ERR_WALKING_0_1:
ErrorData [0] Output pattern.
ErrorData [1] Register value read back.
ErrorData [2] Register test mask.
ErrorData [3] Address of register under test.
ErrorData [4] Not used.
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