LiPPERT Embedded Hurricane-PM, Техническое руководство

Страница: 45 / 52

TME-EPIC-HURPM-R1V5.doc Rev 1.5 Page 39 of 41
I/O Address Map
The system chipset implements a number of registers in I/O address space. These registers occupy
the following map in the I/O space (depending on enabled or disabled functions in the BIOS other or
more resources may be used).
Address Range (Hex) Description
0000-000F DMA Controller 1 (8237)
0020-0021 Interrupt Controller 1 (8259)
0040-0043 Timer Controller (8254)
0060 Keyboard Controller Data Byte
0061 Speaker Control
0064 Kbd Ctlr, CMD,STAT Byte
0070-0073 Real Time Clock
0078 internal
0079 Watchdog
0080-009F DMA Page Registers
00A0-00A1 Interrupt Controller 2 (8259)
00C0-00DF DMA Controller 1 (8237)
00F0-00FF Math Coprocessor
01F0-01F7 Primary IDE Channel
0200-020F GPIO Registers
0274-0279 ISAPnP Data port
02F8-02FF Serial Port 2
0300-031F User Area for Prototype Cards
0370-0373 Watchdog
0376 IDE Controller
0378-037F Parallel Port 1
03B0-03BB VGA Registers
03C0-03DF VGA Registers
03F0-03F5 Floppy Controller Registers
03F6 IDE Command Port
03F7 Floppy Command Port
03F8-03FF Serial Port 1
0400-04BF PCI Bus
04D0-04D1 PCI Bus
0500-051F SMBus Controller
0800-087F Motherboard Resource
0A79-A79 ISAPnP Data port
0CF8-0CFF PCI Bus
14F0-14FF Bus Master IDE I/O Registers
9000-9FFF PCI-PCI Bridge