59
Rev. B
APPLICATIONS INFORMATION
CHECKING TRANSIENT RESPONSE
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, V
OUT
shifts by an
amount equal to ∆I
LOAD(ESR)
, where ESR is the effective
series resistance of C
OUT
. ∆I
LOAD
also begins to charge or
discharge C
OUT
generating the feedback error signal that
forces the regulator to adapt to the current change and
return V
OUT
to its steady-state value. During this recov-
ery time V
OUT
can be monitored for excessive overshoot
or ringing, which would indicate a stability problem. The
availability of the COMP pin not only allows optimization
of control loop behavior but also provides a DC-coupled
and AC-filtered closed-loop response test point. The DC
step, rise time and settling at this test point truly reflects
the closed-loop response. Assuming a predominantly
second order system, phase margin and/or damping fac-
tor can be estimated using the percentage of overshoot
seen at this pin. The bandwidth can also be estimated by
examining the rise time at the pin. The COMP
n
a external
capacitor shown in the Typical Application circuit will pro-
vide an adequate starting point for most applications. The
programmable parameters that affect loop gain are the
voltage range, bit[1] of the MFR_PWM_MODE command,
the current range bit[7] of the MFR_PWM_MODE com-
mand, the g
m
of the PWM channel amplifier bits [7:5] of
MFR_PWM_COMP, and the internal R
COMP
compensation
resistor, bits[4:0] of MFR_PWM_COMP. Be sure to estab-
lish these settings prior to compensation calculation.
The COMP
n
a series internal R
COMP
n
and external C
COMP
n
a
filter sets the dominant pole-zero loop compensation.
The internal R
COMP
n
value can be modified (from 0Ω to
62kΩ) using bits[4:0] of the MFR_PWM_ COMP com-
mand. Adjust the value of R
COMP
n
to optimize transient
response once the final PCB layout is done and the par-
ticular C
COMP
n
b
filter capacitor and output capacitor type
and value have been determined. The output capacitors
need to be selected because the various types and values
determine the loop gain and phase. An output current
pulse of 20% to 80% of full-load current having a rise
time of 1µs to 10µs will produce output voltage and COMP
pin waveforms that will give a sense of the overall loop
stability without breaking the feedback loop. Placing a
power MOSFET with a resistor to ground directly across
the output capacitor and driving the gate with an appro-
priate signal generator is a practical way to produce to a
load step. The R
SERIES
will produce output cur-
rents approximately equal to V
OUT
/R
SERIES
. R
SERIES
val-
ues from 0.1Ω to 2Ω are valid depending on the current
limit settings and the programmed output voltage. The
initial output voltage step resulting from the step change
in output current may not be within the bandwidth of the
feedback loop, so this signal cannot be used to determine
phase margin. This is why it is better to look at the COMP
pin signal which is in the feedback loop and is the filtered
and compensated control loop response. The gain of the
loop will be increased by increasing R
COMP
. If R
COMP
is
increased by the same factor that C
COMP
L
is decreased,
the zero frequency will be kept the same, thereby keeping
the phase shift the same in the most critical frequency
range of the feedback loop. The gain of the loop will be
proportional to the transconductance of the error ampli-
fier which is set using bits[7:5] of the MFR_PWM_COMP
command. The output voltage settling behavior is related
to the stability of the closed-loop system and will demon-
strate the actual overall supply performance. A second,
more severe transient is caused by switching in loads with
large (>1µF) supply bypass capacitors. The discharged
bypass capacitors are effectively put in parallel with C
OUT
,
causing a rapid drop in V
OUT
. No regulator can alter its
delivery of current quickly enough to prevent this sudden
step change in output voltage if the load switch resistance
is low and it is driven quickly. If the ratio of C
LOAD
to
Figure 29. R
COMP
Adjust
INCREASE R
COMP
n
FREQUENCY
4680 F29
GAIN
TYPE II COMPENSATION