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dc1620afb
DEMO MANUAL DC1620A
QUICK START PROCEDURE
PERFORMANCE SUMMARY
(T
A
= 25°C)
PARAMETER
CONDITION
VALUE
Supply Voltage—DC1620A
Depending on Sampling Rate and the A/D Converter
Provided, This Supply Must Provide Up to 500mA
Optimized for 4.5V [4.5V
6.0V Min/Max]
Analog Input Range
Depending on SENSE Pin Voltage
1V
P-P
to 2V
P-P
Logic Input Voltages
Minimum Logic High
1.3V
Maximum Logic Low
0.6V
Logic Output Voltages (Differential)
Nominal Logic Levels (100Ω Load, 3.5mA Mode)
350mV/1.25V Common Mode
Minimum Logic Levels (100Ω Load, 3.5mA Mode)
247mV/1.25V Common Mode
Sampling Frequency (Convert Clock Frequency)
See Table 1
Convert Clock Level
Single-Ended Encode Mode (ENC– Tied to GND)
0V to 3.6V
Differential Encode Mode (ENC– Not Tied to GND)
0.2V to 3.6V
Resolution
See Table 1
Input frequency range
See Table 1
SFDR
See Applicable Data Sheet
SNR
See Applicable Data Sheet
Demonstration circuit 1620A is easy to set up to evaluate
the performance of the LTC2185/LTC2145 A/D converter
family. Refer to Figure 1 for proper measurement equip-
ment setup and follow the procedure below:
Setup
If a DC890 USB data acquisition and collection system
was supplied with the DC1620A demonstration circuit,
follow the DC890 Quick Start Guide to install the required
software and for connecting the DC890 to the DC1620A
and to a PC.
DC1620A Demonstration Circuit Board Jumpers
The DC1620A demonstration circuit board should have
the following jumper settings as default positions: (as
per Figure 1)
JP2-PAR/SER: Selects Parallel or Serial programming
mode. (Default: Serial)
JP3-Duty Cycle Stabilizer: Enables/Disable Duty Cycle
Stabilizer. (Default: Enable)
JP4-SHDN: Enables and disables the LTC2185/LTC2145.
(Default: Enable)
JP5-NAP: Enables and disables NAP mode (Default:
disable)
JP6-LVDS/CMOS: Selects between LVDS and CMOS output
signaling. (Default: LVDS)
Applying Power and Signals to the DC1620A
Demonstration Circuit
If a DC890 is used to acquire data from the DC1620A, the
DC890 must
first
be connected to a powered USB port
or provided an external 6V to 9V
before
ap4.5V
to +6.0V across the pins marked V+ and GND on the
DC1620A. DC1620A requires 4.5V for proper operation.
Regulators on the board produce the voltages required for
the ADC. The DC1620A demonstration circuit requires up
to 500mA depending on the sampling rate and the A/D
converter supplied.
The DC890 data collection board is powered by the USB
cable and does require an external power supply when
collecting data from an LVDS demo board. It must be
supplied from an external 6V to 9V on turrets G7(+) and
G1(–) or the adjacent 2.1mm power jack.
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