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dc1620afb
DEMO MANUAL DC1620A
QUICK START PROCEDURE
This will bring up the menu shown in Figure 4.
• Nap – ADC core powers down while references stay
active
• Shutdown – The entire ADC is powered down
Clock Inversion:
Selects the polarity of the CLKOUT signal.
• Normal (Default) – Normal CLKOUT polarity
• Inverted – CLKOUT polarity is inverted
Clock Delay:
Selects the phase delay of the CLKOUT signal.
• None (Default) – No CLKOUT delay
• 45° – CLKOUT delayed by 45°
• 90° – CLKOUT delayed by 90°
• 135° – CLKOUT delayed by 135°
Clock Duty Cycle:
Enable or disables Duty Cycle Stabilizer.
• Stabilizer off (Default) – Duty cycle stabilizer disabled
• Stabilizer on – Duty cycle stabilizer enabled
Output Current:
Selects the LVDS output drive current.
• 1.75mA (Default) - LVDS output driver current
• 2.1mA – LVDS output driver current
• 2.5mA – LVDS output driver current
• 3.0mA – LVDS output driver current
• 3.5mA – LVDS output driver current
• 4.0mA – LVDS output driver current
• 4.5mA – LVDS output driver current
Internal Termination:
Enables LVDS internal termination.
• Off (Default) – Disables internal termination
• On – Enables internal termination
Outputs:
Enables digital outputs.
• Enabled (Default) – Enables digital outputs
• Disabled – Disables digital outputs
Output Mode:
Selects digital output mode.
• Full Rate – Full rate CMOS output mode (This mode is
not supported by the DC1620A)
Figure 3: PScope Toolbar
Figure 4: Demobd Configuration Options
This menu allows any of the options available for the
LTC2185/LTC2145 family to be programmed serially. The
LTC2185/LTC2145 family has the following options:
Power Control:
Selects between normal operation, nap
and sleep modes.
• Normal (Default) – Entire ADC is powered, and active
• Ch1 Normal Ch2 Nap – Channel 1 remains active while
channel 2 is put into nap mode
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