LG TCH-800, Руководство по обслуживанию

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- 2-8 -
2) PORT DESCRIPTION
PIN ASSIGN NAME I/0 ACT DESCRIPTION
1 XIN I - 4.5 MHz CRYSTAL INPUT
2 TEST2 - - MCU TEST Port.Must be connected to GND.
3 VREG O - BYPASS-CONDENSER Connecting PORT.
4 VSSCPU Voltage Supplied PORT.(4.5V ~ 5.5V)
5 NC SI0/PG3 I/O - No connection
6 NC SO0/PG2 I/O - No connection
7 PDTHSW SCK0/PG1 I/O - Front Panel connecting Detection PORT.
Connection:LOW,/ Disconnection:HIGH
Will be ignored the Key data for 2sec after High
➞
Low.
8 PEJECTKEY PG0 I/O H CDP Model Disc EJECT Key Input PORT.
Logic Deck Model Tape EJECT KEY Input PORT.
9 LCD SI SI1/PF3 II/O I LCD &KEY DRIVER IC INTERFACE PORT.
10 LCD DO SO1/PF2 I/O O
11 LCD CLK SCK1/PF1 I/O O
12 LCD CE PF0 I/O O
13 SQDT SI2/PE3 I/O I SUBQ DATA INUT PIN.
14 PTEST SO2/PE2 I/O - TEST PORT
15 SQCK SCK2/PE1 I/O O SUBQ DATA SYNC CLOCK OUTPUT.
16 ISTAT PE0 I/O I ISTAT INPUT PIN
17 LKFS PD3 I/O -
18 W-LED PD2 I/O O WARING LED Output Port on the Front Panel-Off.
250ms->HIGH and then 750ms
➞
LOW,repeatly
19 T-PLSUP PD1/INT5 I/O I SEARCH(Right)ENCODER Switch Input PORT.
IOS1 7,1XXX IOS1 7,1000B IOS1 1,3H
20 E-PLSUP PD0/INT4 I/O I VOLUME(Left)ENCODER Switch Input Port.IOS1 8,XX1X
21 CDSENSER PC3 1/O H CDP DECK SENSER ON PORT.
22 CHUCK SW PC2 I CDP DISC Loading SW.LOW
➞
DISC IN,HIGH
➞
DISC OUT
23 S0 PC1 I CDP DISC LOAD SW.LOW
➞
DISC OUT,HIGH
➞
DISC IN
24 S1 PC0 I CDP DISC EJECT SW.LOW
➞
DISC OUT,HIGH
➞
DISC IN
25 XREST PB3 O - CDP LSI RESET OUTPUT PORT.
26 NC PB2 O -
27 MLT PB1 O - CDP LSI CONTROL DATA LATCH OUTPUT PORT.
28 MDATA PB0 O CDP LSI CONTROL DATA OUTPUT PORT.
29 OPTION IN PA3 I - OPTION DIODE MATRIX INPUT PORT.
30 OPTION IN PA2 I OPTION DIODE MATRIX INPUT PORT.
31 OPTION IN PA1 I OPTION DIODE MATRIX INPUT PORT.
32 OPTION IN PA0 I OPTION DIODE MATRIX INPUT PORT.
33 OPTION OUT PT1 O - OPTION DIODE MATRX OUTPUT PORT.
34 OPTION OUT PT0 O OPTION DIODE MATRX OUTPUT PORT.
35 OPTION OUT PS3 O OPTION DIODE MATRX OUTPUT PORT.
36 OPTION OUT PS2 O OPTION DIODE MATRX OUTPUT PORT.
37 MCK PS1 O CDP LSI CONTROL DATA CLOCK OUTPUT PORT.
38 TRCNT PS0 I - TRACK CONTROL INPUT PIN.
39 VDDPORT - - Voltage Supplied POR.(4.5V ~ 5.5V)
40 VSSPORT Voltage Supplied POR.(4.5V ~ 5.5V)
41 FOK PR3 I - FOCUS STATE INPUT :"H"=FOCUS O.K
42 MEJECT PR2 O H LOGIC DECK MAIN MOTOR CONROL PORT.
43 MLOAD PR1 O H LOGIC DECK MAIN MOTOR CONROL PORT.
44 CDP ON PR0 O H CDP DECK MAIN POWER ON/OFF PORT.
45 PANNEL PQ3 I H DETACHABLE ON/OFF INPUT PORT.
CONTACT
➞
LOW SEPARATE
➞
HIGH.
46 ECE PQ2 O - EVR IC INTERFACE PORT.
47 EDO PQ1 O EVR IC INTERFACE PORT.
48 ECLK PQ0 O EVR IC INTERFACE PORT.
49 POWER ON PP3 O H POWER CONTROL PORT.
POWER OFF
➞
LOW,POWER ON
➞
HIGH
50 TAPE IN PP2 I H TAPE INSERT DETECTION PORT.