LG TCH-800, Руководство по обслуживанию

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PIN DESCRIPTION
Pin No. Symbol I/O Description
70 LOCK O Output signal of LKFS condition sampled PBFR/16(if LKFS is “H”, LOCK is “H”, if
LKFS is sampled “L” at least 8 times by PBFR/16, LOCK is “L”)
71 PBFR O Write frame clock(Lock:7.35KHz)
72 SMEF O LPF time constant control of the spindle servo error signal
73 SMON O ON/OFF control signal for spindle servo
74 DVDD2 - Digital VDD2
75 SMDP O Spindle Motor drive(Rough control in the SPEED mode, Phase control in the
PHASE mode)
76 SMSD O Spindle Motor drive(Velocity control in the PHASE mode)
77 BCKI I Audio data bit clock input of 48 bit/Slot(2.1168MHz)
78 TESTV I TEST input terminal (GND connection)
79 DSPEED I TEST input terminal(VDD connection)
80 LRCHI I Channel clock input of 48 bit/Slot(44.1KHz)
BLOCK DIAGRAM