3. TECHNICAL BRIEF
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Only for training and service purposes
LGE Internal Use Only
(802.11), Bluetooth®, HS-USB, and MP3. Having multiple controller and buffer circuits allows the non-phone
devices to run, even when the phone circuits are in their sleep modes. Multiple sleep clock outputs are available,
and an external 32.768 kHz sleep crystal is still supported, but the 19.2 MHz XO and on-chip dividers can be used
instead. An on-chip RC oscillator is available for backup; the main oscillators are monitored, and circuits switch
over to the RC output automatically if needed. A realtime clock keeps track of time and generates programmed
alarms.
Other general housekeeping circuits provide adjustments to minimize crystal oscillator frequency errors,
implement smart thermal control (a multistage over-temperature protection scheme), and provide buffered 1.25
VREF outputs.
Handset-level user interfaces are also supported, thereby reducing external circuitry and board space.
An eight channel light pulse generator (LPG) supports blinking or strobing LEDs and backlights. A selection of
current driver outputs are available: up to three programmable, 5 V tolerant backlight/flash drivers (300 mA), up
to three programmable LED drivers (40 mA), one trickle charging indicator, and three LPG controls for external
drivers. Like previous generation PMICs, a programmable vibration motor driver is included (1.2 to 3.1 V
operation in 100 mV increments).
Other (new) user interface functions include three one-touch headset controllers (headset send/end detection
and microphone bias), near field communicator support, a keypad interface capable of supporting an 18 × 8
matrix, an external switch detection that supports headset and flip switches, user programmable logic, and
joystick support.
IC-level interfaces include the single-wire serial bus interface (SSBI) used by the MSM or QSC device to control
and status the PMIC. This bus is supplemented by three interrupt managers for time-critical modem, user
application, and secure application information. Another dedicated IC interface circuit monitors multiple trigger
events and controls the poweron/poweroff sequences.
Three control lines (OPT_x) can be used to set optional PMIC hardware configurations to best support particular
chipsets and applications. As usual, the PMIC supports and orchestrates soft and hard resets, but this latest
offering also includes an external control (via GPIO) for enabling an external SMPS.
Other (new) IC-interface functions include UIM detection (via GPIO) along with UIM level translators (via MPPs
and GPIOs), a PA controller (with its own supply regulator) that supports multiple Tx power amplifiers (four
UMTS PA_ON, two GSM PA_ON, and two PA range controls), a 3:1 UART multiplexer (via GPIOs), and support for
emergency boot.