3. TECHNICAL BRIEF
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B. Intermediate frequency (IF) and Demodulation
A quadrature image-reject mixer downconverts the RF signal to a 100KHz intermediate frequency (IF)
with the RFLO from the frequency synthesizer. The RFLO frequency is between 1737.8 to 1989.9
MHz, and is internally divided by 2 for GSM 850 and E-GSM 900 modes. The mixer output is amplified
with an analog programmable gain amplifier (PGA), which is controlled with the AGAIN[2:0] bits in
register 05h (Figure3-2). The quadrature IF signal is digitized with high resolution A/D converters
(ADCs).
The ADC output is downconverted to baseband with a digital 100KHz quadrature LO signal. Digital
decimation and IIR filters perform channel selection to remove blocking and reference interference
signals. The selectivity setting (CSEL=0) or a low selectivity setting (CSEL=1). The low selectivity filter
has a flatter group channelization filter is in the baseband chip. After channel selection, the digital
output is scaled with a digital PGA, which is controlled with the DGAIN [5:0] bits in register 05h.
The amplified digital output signal go through with DACs that drive a differential analog signal onto the
RXIP,RXIN,RXQP and RXQN pins to interface to standard analog ADC input baseband ICs. No
special processing is required in the baseband for offset compensation or extended dynamic range.
Compared to a direct-conversion architecture, the low-IF architecture has a much greater degree of
immunity to dc offsets that can arise from RF local oscillator(RFLO) self-mixing, 2nd order distortion of
blockers, and device 1/f noise.
Figure. 3-2 SI4205 RECEIVER PART
Содержание C3380
Страница 1: ...Service Manual Model C3380 Date November 2005 Issue 1 0 Service Manual C3380 ...
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Страница 83: ...4 TROUBLE SHOOTING 84 4 11 KEY backlight Trouble Test Points Figure 4 22 ...
Страница 98: ...4 TROUBLE SHOOTING 99 Yes No Yes No Replace M201 Establish a call Replace U101 Software Re_download ...
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Страница 116: ... 117 8 PCB LAYOUT ...
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Страница 125: ...10 STAND ALONE TEST 126 Figure 10 2 HW test setting Figure 10 3 Ramping profile ...
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