Lattice ECP2 Series, Руководство по эксплуатации

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LatticeECP2/M sysCONFIG Usage Guide
The host sends the preamble, BDB3 (hex), and then sends the read command. The LatticeECP2/M sends read
data on D[0:7], driving BUSY high as needed to pause data flow. For an example bitstream see Table 15-7.
Table 15-8 lists the various read commands. Note that the sample bitstream and the list of read commands are for
reference only; to help the user better understand the flow. The actual bitstream, containing the read commands, is
generated by ispLEVER or Diamond and ispVM, the host, toggles the control signals and sends the bitstream.
Table 15-7. Parallel Port Read Bitstream Example
Table 15-8. Parallel Port Read Commands
Slave Parallel mode can support two types of overflow, Bypass and Flowthrough. After the first device has received
all of it’s configuration data, and the Bypass command is detected in the bitstream, the data presented to the D[0:7]
pins will be serialized and bypassed to the DOUT pin (see Figure 15-9). If the Flowthrough command is detected in
the bitstream, instead of the bypass command, the CSON signal will drive the following parallel mode device’s chip
select low as shown in Figure 15-10. If either type of overflow is active, driving both the CSN and CS1N pins high
will reset overflow, i.e. take the device out of overflow.
Frame Contents Description
Header
1111...1111 2 Dummy Bytes
10111101
10110011
2-byte Preamble (BDB3)
Verify ID 8 bytes of command and data
Reset Address 4 bytes of command and data
Read Increment 4 bytes of command and data
Command 32-bit Opcode Function
Reset Address E2000000 Reset address register to point to the first data frame
Read Increment 01vvvvvv
Read back the configuration memory frame selected by the address register and
post increment the address
Read Usercode 83000000 Read the content of the USERCODE register
Read Ctrl Reg 0 84000000 Read the content of Control Register 0
Read CRC 86000000 Read CRC register content
Read ID Code 87000000 Read ID code
NO OP FF
No operation. This is an 8-bit Opcode. Extra bits should not be appended to this
Opcode as this could cause INITN to go low during configuration.
Note: x = don't care, v = variable.