HDMI VIP Input Bridge Board
Evaluation Board User Guide
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. All other brand or product names are
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8
FPGA-EB-02008-1.0
Table 3.2 Connector J2
J2 Connector Pin
Signal Name
SiI1127A pin
J2 Connector Pin
Signal Name
SiI1127A pin
1
3.3 V
—
23
GND
—
2
5 V
—
24
2.5 V
—
3
3.3 V
—
26
GND
—
4
5 V
—
28
RX_RST
RESET#
5
GND
—
30
RX_MUTE
GPIO3/MUTEOUT*
6
5V
—
32
RX_SPDIF
SPDIF
7
RODCK
ODCK
34
GND
—
8
GND
—
40
GND
—
9
GPIO0
GPIO0/XCLKOUT2
41
CSCL
CSCL
10
RVSYNC
VSYNC
43
CSDA
CSDA
11
GND
—
46
GND
—
12
UP_GPIO15
Q14
52
GND
—
13
RHSYNC
HSYNC
55
GND
—
14
GND
—
57
GND
—
15
UP_GPIO16
Q15
58
GND
—
16
RX_INT
INT
59
GND
—
17
GND
—
25, 27, 29,31, 33,
Not Connected
—
18
UP_GPIO4
Q3
35, 36, 37, 38, 39,
19
RDE
DE
42, 44, 45, 47, 48,
20
GND
—
49, 50, 51, 53, 54,
21
UP_GPIO3
Q2
56, 60
22
2.5 V
—
*Note:
Connected to SW2