39
ECP5 PCI Express Board User’s Guide
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Place subLVDS Termination Resistors as close as possible to FPGA (U1)
subLVDS Termination Not Installed (TN1210)
Lvds1TxB3p
[Pg13]
Lvds1TxB3n
[Pg13]
Lvds1TxB2p
[Pg13]
Lvds1TxB2n
[Pg13]
Lvds1TxB1p
[Pg13]
Lvds1TxB1n
[Pg13]
Lvds1TxB0p
[Pg13]
Lvds1TxB0n
[Pg13]
Lvds1Tx0p
[Pg13]
Lvds1Tx0n
[Pg13]
Lvds1Tx2p
[Pg13]
Lvds1Tx2n
[Pg13]
Lvds1Tx1p
[Pg13]
Lvds1Tx1n
[Pg13]
Lvds1TxCp
[Pg13]
Lvds1TxCn
[Pg13]
Lvds1TxBCp
[Pg13]
Lvds1TxBCn
[Pg13]
Lvds1Tx3p
[Pg13]
Lvds1Tx3n
[Pg13]
tLvds1TxCn
[Pg23]
tLvds1Tx3p
[Pg23]
tLvds1Tx3n
[Pg23]
tLvds1Tx0p
[Pg23]
tLvds1Tx0n
[Pg23]
tLvds1TxCp
[Pg23]
tLvds1TxB3p
[Pg23]
tLvds1TxB3n
[Pg23]
tLvds1TxB0p
[Pg23]
tLvds1TxB0n
[Pg23]
tLvds1TxBCp
[Pg23]
tLvds1TxBCn
[Pg23]
tLvds1Tx2p
[Pg23]
tLvds1Tx2n
[Pg23]
tLvds1Tx1p
[Pg23]
tLvds1Tx1n
[Pg23]
tLvds1TxB2p
[Pg23]
tLvds1TxB2n
[Pg23]
tLvds1TxB1p
[Pg23]
tLvds1TxB1n
[Pg23]
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
21
ECP5 Bank 2 - 3 #1 Termination
B
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
21
ECP5 Bank 2 - 3 #1 Termination
B
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
21
ECP5 Bank 2 - 3 #1 Termination
B
R396
0
R0402
R390
0
DNI
R0402
R380
0
R0402
R402
0
R0402
R144
0
DNI
R0402
R173
0
DNI
R0402
R388
0
R0402
R142
0
R0402
R398
0
R0402
R405
0
R0402
R157
0
R0402
R162
0
R0402
R383
0
R0402
R145
0
R0402
R392
0
R0402
R152
0
R0402
R160
0
R0402
R376
0
DNI
R0402
R179
0
DNI
R0402
R375
0
R0402
R172
0
R0402
R178
0
R0402
R153
0
DNI
R0402
R377
0
DI
R0402
R161
0
DNI
R0402
R381
0
DNI
R0402
R404
0
DNI
R0402
R174
0
R0402
R397
0
DNI
R0402
R180
0
R0402
PCI Express Board