35
ECP5 PCI Express Board User’s Guide
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Place termination
resistors RX_D0-3,
RX_ER, RX_DV, RX_CLK,
TX_CLK, CRS, COL, RSTN
as close to the
G-PHY as possible
using 50 ohm impedence
traces.
Place termination
resistors TX_D0-3,
TX_ER, TX_EN,
GTX_CLK as close to
FPGA as possible
using 50 ohm
impedence traces.
MH1 and MH2
are 0.100"
diameter plated
through holes
Ethernet RJ45 Connector
Place caps close to RJ45 jack
TX and RX traces
are all matched length < 2"
SFP Connections
not used
PhyCLK125 = C17/PCLKT0_0 (Default)
PhyCLK125Pll = B29/URC_GPPLL1T_IN
PhyVddo2-5
PhyDvdd
PhyXtal_IN
PhyXtal_OUT
PhyLed2
PhyLed0
PhyLed1
PhyLed2
PhyAvdd1-8
PhyAvdd1-8
PhyAvdd1-8
PhyAvdd1-8
PhyAvdd1-8
PhyDvdd
PhyDvdd
PhyDvdd
PhyAvdd3-3
PhyAvdd1-8
EthMDdi1n
EthMDdi2p
EthMDdi1p
EthMDdi3n
EthMDdi3p
PhyLed0
EthMDdi2n
EthMDdi0p
EthMDdi0n
PhyLed1
PhyXtal_IN
EthMDdi0n
EthMDdi0p
EthMDdi1p
EthMDdi1n
EthMDdi2p
EthMDdi2n
EthMDdi3p
EthMDdi3n
PhyVddo2-5
PhyVddo2-5
PhyVddo2-5
PhyVddo2-5
PhyAvdd3-3
PhyAvdd3-3
PhyAvdd3-3
PhyAvdd1-8
PhyXtal_OUT
3_3V
2_5V
PHY_VCC_CT
3_3V
PHY_VCC_CT
2_5V
PhyTxD0
[Pg19]
PhyRxCtrl
[Pg20]
PhyRxD0
[Pg19]
PhyRxD1
[Pg19]
PhyRxClk
[Pg19]
PhyRxD2
[Pg19]
PhyRxD3
[Pg19]
PhyTxClk
[Pg19]
PhyTxD1
[Pg19]
PhyTxD2
[Pg19]
PhyTxD3
[Pg19]
PhyTxCtrl
[Pg20]
PhyConfig
[Pg20]
PhyMdio
[Pg20]
PhyResetn
[Pg20]
PhyMdc
[Pg20]
PhyClk125
[Pg19]
PhyClk125Pll
[Pg19]
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
17
RJ45
B
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
17
RJ45
B
Date:
Size
Schematic Rev
of
Sheet
Title
Lattice Semiconductor Applications
Email: [email protected]
Board Rev
Project
Nov, 2012
B
B
28
17
RJ45
B
FB16
74279265
1
2
C222
27pF
C0603
R77
0
TP15
C187
0.1uF
C0402
R299
0
DNI
R66
0
C210
0.1uF
C0402
R306
100
TP25
C235
0.01uF
R65
0
C188
0.01uF
R294
4.99k
C231
0.01uF
TP26
Y1
25MHZ CRYSTAL
R40
0
C190
0.01uF
C196
0.1uF
C0402
TP34
FB18
74279265
1
2
C200
0.1uF
C0402
C189
0.01uF
U11
88E1512_56QFN
RX_CTRL
43
RXD[0]
44
RXD[1]
45
RX_CLK
46
RXD[2]
47
RXD[3]
48
VDDO
49
TXD[0]
50
TXD[1]
51
VDDO
52
TX_CLK
53
TXD[2]
54
TXD[3]
55
TX_CTRL
56
S_INP
1
S_INN
2
AVDD18
3
S_OUTP
4
S_OUTN
5
DVDD
6
MDC
7
MDIO
8
CLK125
9
VDDO_SEL
10
VDDO
11
LED[2]/INTn
12
LED[1]
13
LED[0]
14
MDIP[0]
28
MDIN[0]
27
AVDD18
26
AVDD33
25
MDIP[1]
24
MDIN[1]
23
MDIP[2]
22
MDIN[2]
21
AVDD33
20
AVDD18
19
MDIP[3]
18
MDIN[3]
17
RESETn
16
CONFIG
15
DVDD
42
REGCAP2
41
DVDD_OUT
40
AVDD18_OUT
39
AVDD18
38
REGCAP1
37
REG_IN
36
AVDDC18
35
XTAL_IN
34
XTAL_OUT
33
HSDACP
32
HSDACN
31
RSET
30
RSTPT
29
VSS
EPAD
R83
0
C209
0.1uF
C0402
C219
220nF
C0402
C211
0.1uF
C0402
C185
0.1uF
C0402
C178
4.7uF
C0603
R87
4.7k
DNI
TP9
C221
27pF
C0603
C193
10uF
C0805
R277
100
R41
0
R274
4.7k
1
2
3
6
4
5
7
8
RJ45
YELLOW
ORANGE
J37
L829-1J1T-43
MDIA-
10
MDACT
12
MDIA+
11
SHLD1
19
MDIB+
4
MDIB-
5
MDBCT
6
MDIC+
3
MDCCT
1
MDIC-
2
MDID+
8
MDDCT
7
MDID-
9
SHLD2
20
LED1-
13
LED1+
14
LED2-
15
(COMMON)LED2+
16
GRN-
17
C203
10uF
C0805
C205
0.1uF
C0402
R298
0
R61
4.7k
R291
50
C224
0.1uF
C0603
R63
4.7k
C208
0.1uF
C0402
C186
0.1uF
C0402
R79
0
C228
10uF
C0805
FB17
74279265
1
2
R292
50
R74
20
U44
R0_1-3
3
1
2
PCI Express Board