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mITX-SKL-H – User Guide, Rev.1.1

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Sub-screen

Function

Second level Sub-screen/Description

Hardware
Health
Configuration>
(continued)

System Fan Cruise
Control>

Disable = full speed
Thermal = does regulate fan speed according to specified temperature
Speed = does regulate according to specified speed

CPU Fan Speed>

Display CPU fan speed

CPU Fan Cruise
Control>

Disable = full speed
Thermal = does regulate fan speed according to specified temperature
Speed = does regulate according to specified speed

Watchdog
Function>

0 = Disable.
Enter the service interval in seconds before the system will reset

GPP_B11 GPO
Setting>

This GPP_B11 is WDT related. This setting programs GPP_B11 as GPO only.
It does not program WDT timer into EC

ITE8528 Firmware
Update>

This option enables auto update when version is not a match, force update
or disable update EC firmware.

PC Speaker/Beep>

Controls the default beeps during boot of the system

LAN
Configuration
& Show>

I211 ETH1 MacAddr
& LinkStatus>

Display I211 ETH1 MacAddr & LinkStatus

I211 ETH2 MacAddr
& LinkStatus>

Display I211 ETH2 MacAddr & LinkStatus

I211 ETH3 MacAddr
& LinkStatus>

Display I211 ETH3 MacAddr & LinkStatus

I211 ETH4 MacAddr
& LinkStatus>

Display I211 ETH4 MacAddr & LinkStatus

LVDS
Configuration
&Show>

LVDS Flat Panel
Display Support>

Enable/disable LVDS flat panel display support

EDID ROM
Emulation>

Enable/disable EDID ROM emulation to support panels with no EDID ROM

EDID ROM Flash
Page Number>

PTN3460 can store seven copies of EDID ROM on internal flash

Panel Type>

Select the type or manufacturer’s name of the display panel

Resolution>

Select the screen resolution of the display panel

Panel Color Depth>

Select the display panel color depth

Panel Voltage>

Select the voltage level for powering the LVDS display panel

Channel>

Select LVDS interface signals mode single-channel or dual-channel
(Sometimes called “single-pixel” or “dual-pixel”)

Bus Swapping>

Swap LVDS interface signals: Normal – uses bus as indicated by pin name,
Swapped – swaps ‘odd’ bus signals with ‘even’ bus signals

Clock Frequency
Center Spread>

Programmable center spreading of pixel clock frequency to minimize EMI

Differential Output
Swing Level>

Programmable LVDS signal swing to pre-compensate for channel
attenuation or allow for power saving

Backlight>

Enable/disable backlight

Backlight Signal
Inversion>

Enable – active high
Disable – active low for display panel backlight signal

Backlight PWM
Frequency>

Set the PWM frequency the backlight

Brightness Level>

Select the Brightness level for the backlight of the display panel

Содержание mITX-SKL-H

Страница 1: ...USER GUIDE mITX SKL H User Guide Rev 1 1 Doc ID 1060 7483...

Страница 2: ...will be suitable for the specified use without further testing or modification Kontron expressly informs the user that this user guide only contains a general description of processes and instructions...

Страница 3: ...s is entirely at your risk To minimize the risks associated with your products and applications you should provide adequate design and operating safeguards You are solely responsible for compliance wi...

Страница 4: ...tron com terms and conditions For contact information refer to the corporate offices contact information on the last page of this user guide or visit our website CONTACT US Customer Support Find Kontr...

Страница 5: ...y endanger your life health and or result in damage to your material Please refer also to the High Voltage Safety Instructions portion below in this section ESD Sensitive Device This symbol and title...

Страница 6: ...before performing any work on this product Earth ground connection to vehicle s chassis or a central grounding point shall remain connected The earth ground cable shall be the last cable to be discon...

Страница 7: ...oduct then re pack it in the same manner as it was delivered Special care is necessary when handling or unpacking the product See Special Handling and Unpacking Instruction Quality and Environmental M...

Страница 8: ...wer Consumption 23 5 Connector Locations 26 5 1 Top Side 26 5 2 Connector Panel Side 28 5 3 Rear Side 29 6 Connector Definitions 30 7 I O Area Connectors 31 7 1 DP Connectors DP1 DP2 J14 31 7 1 1 mini...

Страница 9: ...solutions 22 Table 3 Supply Voltage Requirements 23 Table 4 Pin Assignment DP Connector DP1 DP2 J14 31 Table 5 Pin Assignment mini DP Connector DP3 J15 32 Table 6 Pin Assignment RJ45 LAN Connectors J5...

Страница 10: ...iguration Sub screens and Functions 83 Table 38 Security Setup Menu Functions 90 Table 39 Boot Setup Menu Functions 91 Table 40 Save and Exit Setup Menu Functions 91 List of Figures Figure 1 System Bl...

Страница 11: ...e mITX SKL H motherboard s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in the following chapter befo...

Страница 12: ...SD protective clothing and shoes Wear an ESD preventive wrist strap attached to a good earth ground Check the resistance value of the wrist strap periodically 1 M to 10 M Transport and store the board...

Страница 13: ...screws with integrated washer and a diameter of 7 mm Do not use washers with teeth as they can damage the PCB and cause short circuits When mounting the board in a chassis take into consideration tha...

Страница 14: ...iants Standard Operating Temperature 0 C to 60 C Operating Product Number Product Name Description 810670 4500 MITX SKL H CON XEON E3 1505M Xeon E3 1505M 2 8 GHz 45W GT2 CM236 PCH vPro ECC DP w cooler...

Страница 15: ...mITX SKL H User Guide Rev 1 1 www kontron com 15 4 System Specifications 4 1 System Block Diagram mITX SKL H Figure 1 System Block Diagram mITX SKL H...

Страница 16: ...echnology Intel Rapid Storage Technology Enterprise SATA Serial ATA Gen 3 USB revision 2 0 USB revision 3 0 PCI Express revision 3 0 ACPI 6 0 compliant HD video playback Security WIBU CodeMeter ASIC 1...

Страница 17: ...nd TIMER Multiplexed via Feature connector WAKE UP Interrupt Inputs Multiplexed via Feature connector 3 Wire Bus for GPIO Expansion up to 152 GPIOs via Feature connector 4 Wire SPI connector for GPIO...

Страница 18: ...4 bit Windows 10 64 bit WES Windows Embedded Standard 7 64 bit Linux Linux 64 bit Fedora 22 64 bit Yocto 2 1 2 64 bit 4 3 Environmental Conditions The mITX SKL H is compliant with the following enviro...

Страница 19: ...voltage fluctuations and flicker for commercial environments EN55024 2010 Immunity IEC EN 61000 4 2 Electrostatic discharge ESD IEC EN 61000 4 3 Radiated field IEC EN 61000 4 4 Electrical fast transie...

Страница 20: ...1060 1672 CPU Cooler mITX SKL H Figure 2 CPU Cooler mITX SKL H height above PCB 44 7 mm 4 6 System Memory The mITX SKL H supports a dual channel DDR4 memory interface with one SO DIMM socket per chan...

Страница 21: ...mes during lifetime of the motherboard Kontron guarantees that the part numbers above will be maintained so that other similar types of qualified modules replace EOL modules As a minimum it is recomme...

Страница 22: ...oLVDS convertor Table 2 Display Resolutions Display Configuration Maximum Display Resolution Display Port mini Display Port 4096 x 2304 px 60 Hz 24 bpp HDMI 1 4 native 4096 x 2160 px 24 Hz 24 bpp HDMI...

Страница 23: ...a suitable cable kit and PS_ON active ATX12V supply ATX 12V 4 pin connector must be used in according to the ATX12V PSU standard Hot Plugging the power supply is not supported Hot plugging might dama...

Страница 24: ...ly Actual Current Draw Power Consumption 12 V 11 77 V 6528 mA 76 84 W 24 V 24 02 V 3034 mA 72 88 W Low Power Windows 10 64 bit S3 Sleep Supply Actual Current Draw Power Consumption 12 V 12 04 V 182 mA...

Страница 25: ...bit Intel TAT 100 all CPU cores and GFX Supply Actual Current Draw Power Consumption 12 V 12 00 V 10193 mA 122 32 W 24 V 24 00 V 5168 mA 124 03 W High Power Windows 10 64 bit S3 Sleep Supply Actual C...

Страница 26: ...ure 3 Top Side Item Designation Description See Chapter 1 J22 COM Port 1 RS232 8 8 2 J20 MicroSIM Card Connector 8 15 2 3 J26 Feature Connector 8 11 4 J2 DDR4 SO DIMM Slot 2 4 6 5 J1 DDR4 SO DIMM Slot...

Страница 27: ...TA 1 Connector 8 3 15 J12 SATA 2 Connector 8 3 16 J13 SATA 4 Connector 8 3 17 J11 SATA 3 Connector 8 3 18 J23 SATA Power Connector 1 19 J24 SATA Power Connector 2 20 J3 Internal USB 3 0 Connector 8 4...

Страница 28: ...7 2 5 J8 bottom Ethernet Port 4 10 100 1000 Mb 7 2 6 J5 LAN Ethernet Port 2 10 100 1000 Mb 7 2 7 J5 top USB USB Port 3 USB 2 0 7 3 2 8 J5 bottom USB USB Port 4 USB 2 0 7 3 2 9 J21 LAN Ethernet Port 1...

Страница 29: ...mITX SKL H User Guide Rev 1 1 www kontron com 29 5 3 Rear Side Figure 5 Rear Side Item Designation Description See Chapter 1 Backplate CPU Cooler 2 J16 XDP Connector NC 1 2...

Страница 30: ...ain output NC Pin not connected O Output TTL compatible OC Output open collector or open drain TTL compatible OT Output with tri state capability TTL compatible LVDS Low Voltage Differential Signal PW...

Страница 31: ...nment DP Connector DP1 DP2 J14 Pin Signal Description Type Note 1 21 Lane 0 LVDS 2 22 GND PWR 3 23 Lane 0 LVDS 4 24 Lane 1 LVDS 5 25 GND PWR 6 26 Lane 1 LVDS 7 26 Lane 2 LVDS 8 28 GND PWR 9 29 Lane 2...

Страница 32: ...Signal Description Type Note 1 Lane 0 LVDS 2 GND PWR 3 Lane 0 LVDS 4 Lane 1 LVDS 5 GND PWR 6 Lane 1 LVDS 7 Lane 2 LVDS 8 GND PWR 9 Lane 2 LVDS 10 Lane 3 LVDS 11 GND PWR 12 Lane 3 LVDS 13 Config 1 Aux...

Страница 33: ...5 J8 J21 Pin Signal Type Ioh Iol Note 1 MDI0 2 MDI0 3 MDI1 4 MDI2 5 MDI2 6 MDI1 7 MDI3 8 MDI3 MDI media dependent Interface Signal Description Signal Description MDI0 MDI0 In MDI mode this is the firs...

Страница 34: ...ts 3 4 are supplied on the combined 2x USB and LAN connector J5 Figure 9 USB 2 0 USB 3 0 sockets USB 2 0 USB3 0 7 3 1 USB Port 1 and USB Port 2 J21 USB port 1 and 2 supports USB 3 0 USB 2 0 and are lo...

Страница 35: ...upport USB2 0 and are located on the stacked USB LAN connector J5 Table 8 Pin Assignment USB Port 3 and USB Port 4 J5 Pin Signal Type Note Top 8 GND PWR 7 D6 IO USB 2 0 differential pair 6 D6 IO USB 2...

Страница 36: ...HiSpeed USB cable specified in USB3 0 standard USB 3 0 High Speed Cable W G B R Polyvinyl Chloride PVC Jacket Outer Shield 65 Interwoven Tinned Copper Braid Inner Shield Aluminum Metallized Polyester...

Страница 37: ...n Assignment J6 Center Speaker Green Pin Designation Signal Type Note Tip FRONT OUT L OA For headphone max 1 0 VRMS Ring FRONT OUT R OA For headphone max 1 0 VRMS Sleeve GND PWR Table 11 Pin Assignmen...

Страница 38: ...gging of the power connectors is not allowed Hot plugging might damage the board When connecting to the motherboard turn off main supply to make sure all the power lines are turned off Table 12 Pin As...

Страница 39: ...wer connectors is not allowed Hot plugging might damage the board When connecting to the motherboard turn off the main supply to make sure all the power lines are turned off Figure 11 4 Pin ATX 12 V P...

Страница 40: ...GND Ground PWR 2 12 V Power 12 V PWR 3 TACHO Tacho signal I 4 PWM PWM Output O 3 3 Table 15 Pin Assignment 3 Pin Fan Support Mode Pin Signal Description Type 1 GND Ground PWR 2 12 V Power 12 V PWR 3...

Страница 41: ...the hidden RAID data will be erased from the selected SATA drive Supported SATA features AHCI Advanced Host Controller Interface 1 3 and 1 3 1 2 to 4 drive RAID 0 data striping 2 drive RAID 1 data mi...

Страница 42: ...nal Connector J3 Pin Signal Type Ioh Iol Note 1 V_VBUS PWR 2 RX5 USB 3 0 3 RX5 USB 3 0 4 GND PWR 5 TX5 USB 3 0 6 TX5 USB 3 0 7 GND PWR 8 D5 USB 2 0 9 D5 USB 2 0 10 NC 11 D4 USB 2 0 12 D4 USB 2 0 13 GN...

Страница 43: ...udio interface electrical SPDIF Out is available through the 2 pin connector J33 and can be used to implement eight 7 1 High Definition audio channels The audio interface is based on a high fidelity 8...

Страница 44: ...WR 23 MIC2 L AI 24 MIC2 R AI Signal Description Signal Description VBUS 5 V supply for external devices Standby 5 V is supplied during power down to allow wakeup on USB device activity Protected by ac...

Страница 45: ...s continues even though the reset input is kept low LINE2 Line2 is second stereo line signals Line 2 does not have Jack detection capabilities MIC2 MIC2 is second stereo microphone input MIC2 does not...

Страница 46: ...receives data from the communications link DTR Data Terminal Ready indicates to the modem etc that the on board UART is ready to establish a communication link DSR Data Set Ready indicates that the m...

Страница 47: ...t Serial COM 2 Port J35 Pin Signal Type Ioh Iol Pull U D Note 1 RS485_TX1 O Data in half duplex mode 2 RS485_RX1 I 3 RS485_TX1 O Data in half duplex mode 4 RS485_RX1 I 5 GND PWR Signal Description Sig...

Страница 48: ...R 7 5 V PWR Max 0 5 A 8 GND PWR 9 LCDVCC PWR Max 0 5 A 10 LCDVCC PWR Max 0 5 A 11 DDC CLK OT 2 2 K 3 3 V 12 DDC DATA OT 2 2 K 3 3 V 13 BKLTCTL OT 3 3 V level 14 VDD ENABLE OT 3 3 V level 15 BKLTEN OT...

Страница 49: ...ange 0 V 3 3 V BKLTEN Backlight enable signal active low VDD ENABLE Output display enable LCDVCC VCC supply to the display 5 V or 3 3 V 1 A maximum selected in BIOS setup menu Power sequencing depends...

Страница 50: ...o 3 3 V dual 3 3 V or SB 3 3 V 5 PWR_OK O 25 mA 25 mA 6 EXT_BAT PWR 7 NC 8 NC 9 SB3V3 PWR 10 SB5V PWR 11 GPIO0 IOT 12 GPIO1 IOT 13 GPIO2 IOT 14 GPIO3 IOT 15 GPIO4 IOT 16 GPIO5 IOT 17 GPIO6 IOT 18 GPIO...

Страница 51: ...al connected to GND The external battery is protected against charging and can be used with or without the on board battery installed SB3V3 Maximum load is 0 75 A 1 5 A 1 sec SB5 V StandBy 5 V supply...

Страница 52: ...WM4 GPA4 O8 IOS GPIO7 PWM5 GPA5 O8 IOS GPIO8 ADC0 GPI0 AI IS GPIO9 ADC1 GPI1 AI IS GPI10 ADC2 GPI2 AI IS GPI11 ADC3 GPI3 AI IS GPI12 ADC4 WUI28 GPI4 AI IS IS GPI13 RI1 WUI0 GPD0 IS IS IOS GPI14 RI2 WU...

Страница 53: ...tandby voltage power line Normal output power but when the motherboard is turned off the on board SPI Flash can be 3 3 V power sourced via this pin CS0 CS0 Chip Select 0 active low ADDIN ADDIN input s...

Страница 54: ...signal Master In Slave Out SPI CLK SPI signal Clock SPI CS SPI signal Chip Select GND Power Supply ground signal 8 14 Switches and Jumpers 8 14 1 Always On Jumper Setting J39 The Always On jumper J39...

Страница 55: ...le an incorrect BIOS setting that causes the attached display not to turn on can be erased by this jumper More information on setting the Load BIOS Default jumper can be found in the following table T...

Страница 56: ...graphics card The maximum theoretical bandwidth using 16 lanes is 16 GB s Table 30 Pin Assignment PCIe x16 Slot Connector J4 Side B Connector Side A Connector Pin Name Description Name Description 1 1...

Страница 57: ...5 Receiver Lane 5 Differential pair 40 GND Ground PEG_RXN 5 41 PEG_TXP 6 Transmitter Lane 6 Differential pair GND Ground 42 PEG_TXN 6 GND Ground 43 GND Ground PEG_RXP 6 Receiver Lane 6 Differential pa...

Страница 58: ...XP 14 Receiver Lane 14 Differential pair 77 GND Ground PEG_RXN 14 78 PEG_TXP 15 Transmitter Lane 15 Differential pair GND Ground 79 PEG_TXN 15 GND Ground 80 GND Ground PEG_RXP 15 Receiver Lane 15 Diff...

Страница 59: ...CIE14 SATA_RX 1B O 24 3 3 V PWR 25 PCIE14 SATA_RX 1B O 26 GND PWR 27 GND PWR 28 1 5 V PWR 29 GND PWR 30 SMB_CLK I 31 PCIE14 SATA_TX 1B I 32 SMB_DATA IO 33 PCIE14 SATA_TX 1B I 34 GND PWR 35 GND PWR 36...

Страница 60: ...M 2 SSD Boot Storage PCIE M 2 SSD with NVME class code Supported Supported PCIE M 2 SSD with AHCI class code Not supported Supported SATA M 2 SSD Supported Supported Table 32 Pin Assignment M 2 J18 P...

Страница 61: ...SATA0A_TX I 48 NC 49 PCIE9_SATA0A_TX I 50 PCH_PLT_RST_BUFF I 51 GND PWR 52 M2_CLKREQ O 53 M2_REFCLK6 I 54 PCH_WAKE O 55 M2_REFCLK6 I 56 NC 57 GND PWR 58 NC 59 Connector key NC 60 Connector key NC 61 C...

Страница 62: ...tected a request for password will appear Enter either the User Password or the Supervisor Password see Chapter 9 2 4 Security Setup Menu press RETURN and proceed with step 5 5 A setup menu will appea...

Страница 63: ...ub screens and provides basic system information as well as functions for setting the system time and date Table 34 Main Setup Menu Sub screens and Functions Sub screen Description Board Information R...

Страница 64: ...on Show LVDS Configuration Setting items on this screen to incorrect values may cause the system to malfunction Table 35 Advanced Setup Menu Sub screens and Functions Sub screen Function Second level...

Страница 65: ...Enable disable utilization of additional hardware capabilities provided by Intel Trusted Execution technology Note Changes require a full power cycle to take effect Alias Check Request DPR Memory Siz...

Страница 66: ...led unless max turbo ratio is bigger than 16 View Configure Turbo Options Energy Efficient P State Enable disable energy efficient P State feature Package Power Limit MSR Lock Enable disable locking o...

Страница 67: ...Power defined in 1 8 Watt increments Range 0 8192 Acoustic Noise Settings Acoustic Noise Mitigation Enable disable acoustic noise mitigation IA VR Domain Display disable fast PKG C state ramp for IA...

Страница 68: ...values for power limit 4 C State Enable disable CPU power management CPU to enter C state when not 100 utilized Enhanced C State Enable disable C11E If all cores enter C state CPU switches to min spe...

Страница 69: ...wer Management Control RC6 Render Standby Check to enable render standby support Maximum GT Frequency Choose between 350MHz RPN and 1000MHz RPO Value beyond the range will be clipped to min max suppor...

Страница 70: ...nable Enable disable MEBx OEM debug menu Unconfigure ME Enable disable unconfigure ME MEBx Resolution Settings Non UI Mode Resolution Resolution for non UI text mode UI Mode Resolution Resolution for...

Страница 71: ...t VR power on to avoid a current spike VR Ramp Up Delay Delay between subsequent VR ramp ups if they are all turned on at the same time PCIE Slot 5 Device Power On Delay Delay between applying core po...

Страница 72: ...rity device Note Computer will reboot during restart to change state of security device Device Select TPM 1 2 restricts support to TPM 1 2 device TPM 2 0 restricts support to TPM 2 0 device Auto suppo...

Страница 73: ...rrors Stop Bits Stops bits indicate the end of a serial data packet Flow Control Flow control can prevent data loss from buffer overflow VT UTF8 Combo Key Support Enable VT UTF8 Combination Key Suppor...

Страница 74: ...reset VC TC mapping Network Stack Configuration Network Stack Enable disable UEFI network stack CSM Configuration CSM Support Enable disable compatibility support module support NVMe Configuration NVM...

Страница 75: ...dr LinkStatus Display I211 ETH4 MacAddr LinkStatus LVDS Configuration Show LVDS Flat Panel Display Support Enable disable LVDS flat panel display support EDID ROM Emulation Enable disable EDID ROM emu...

Страница 76: ...Opt Out Sky CAM Device B0 D5 F0 Table 36 Chipset Setup Menu System Agent Configuration Sub screens and Functions Function Second level Sub screen Description Memory Configurations Read only field Memo...

Страница 77: ...orting Lock Thermal Management Registers Enable locks several CPU registers related to DDR power thermal management Extern Therm Status Enable uses EXTTS value Closed Loop Therm Manage Disable Pcode i...

Страница 78: ...disable capacity to lock or not MC registers Probeless Trace HD Port GDXC IOT MOT or disable Enable Disable IED Intel Enhanced Debug Enable disable Intel Enhanced Debug required 4MB SMM memory Ch Has...

Страница 79: ...ay Graphics Configuration Graphics Turbo IMON Current Displays supported graphics turbo IMON current values 14 31 Skip Scanned for External GfX Card Enable no scan made for external Gfx cards on PEG o...

Страница 80: ...n3 Endpoint Preset Value for Each Lane Gen3 Endpoint Hint Value for Each Lane Gen3 RxCTLE Control Bundle 0 Display Gen3 RxCTLE setting for selected bundle 0 or 1 Bundle 1 DMI Link ASPM Control Enable...

Страница 81: ...est Select the number of presets to test Chose 7 3 5 8 or 0 9 or Auto for default value Note Do not change from the default unless debugging Allows PERST GPIO Usage Enable disable GPIO based resets to...

Страница 82: ...subscreen functions are included in the menu PCI Express Configuration SATA and RST Configuration USB Configuration Security Configuration HD Audio Configuration Serial IO Configuration ISH Configura...

Страница 83: ...IO Root port function swap If any function other than 0th is enabled 0th becomes visible PCI Express Gen 3 Eq Lanes PCIE Cm 1 20 PCIE Cp 1 20 Display PCIE Cm 1 20 Display PCIE Cp 1 20 Overrides SW EQ...

Страница 84: ...re is no device and potentially disabling Extra Bus Reserved Extra bus reserved 0 7 for bridges behind this root bridge Reserved Memory Reserved memory for this root bridge 1 20 MB Reserved I O Reserv...

Страница 85: ...SATA or Flex or Direct Connect or M2 Topology Enable disable SATA Port DevSlp SATA Port DevSlp Enable disable DITO configuration DITO Configuration Display DITO value DITO Value Display DM value USB C...

Страница 86: ...quency Selects iDisplay Link frequency Applicable only if iDisp codec supports selected frequency HD Audio DSP Features Configuration Read Only field DMIC Bluetooth and I2S WoV Wake on Voice Enable di...

Страница 87: ...e controller Connected Device Indicate what type of device is connected to this serial IO controller Serial IO I2C1 Settings I2C IO Voltage Select Select 1 8 V or 3 3 V for the controller Connected De...

Страница 88: ...mory region 0 or 1 buffer size Memory Region 1 Buffer Size PCH Thermal Throttling Control Thermal Throttling Level Determines if the Intel suggested setting is used or a manual setting DMI Thermal Set...

Страница 89: ...ion ID feature PCH Cross Throttling Enable disable PCH cross throttling feature Note Only ULT supports this feature Disable Energy Reporting Enables disables PCH energy reporting feature Note SET to d...

Страница 90: ...Boot Mode Selects between standard and custom Customer mode secure boot variables can be configured without authentication Key Management Enables expert users to modify secure boot policy variables wi...

Страница 91: ...enu The exit setup menu provides functions for handling changes made to the UEFI BIOS settings and the exiting of the setup program Table 40 Save and Exit Setup Menu Functions Function Description Sav...

Страница 92: ...ating system BTX Balanced Technology Extended motherboard configuration specification bpp bit per pixel CMOS Complementary Metal Oxide Semiconductor technology for constructing integrated circuits COM...

Страница 93: ...ge Technology Intel RTC Real Time Clock SATA Serial ATA bus interface SIM SIM card subscriber identification module SMB System Management Bus single ended simple two wire bus for the purpose of lightw...

Страница 94: ...result is an accelerated time to market reduced total cost of ownership product longevity and the best possible overall application with leading edge highest reliability embedded technology Kontron i...

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