KTD-N0886-E
Page 78
BIOS - Advanced
KTQM87/mITX Users Guide
South Bridge Configuration
Phoenix SecureCore Technology Setup
Advanced
South Bridge Configuration
Item Specific Help
SMBUS Device
Port 80h Cycles
PCI Clock Run Logic
HPET Support
HPET Memory Map BAR
Enable CRID
DeepSx Mode
GP27 Wake From DeepSx
State After G3
► SB PCI Express Config
► SB USB Config
► SB Azalia Config
► SB
Serial IRQ Config
► SB
Security Config
► SB
NFC Configuration
[
Enabled
]
[LPC Bus]
[Enabled]
[Enabled]
[FED00000]
[Disabled]
[Disabled]
[Disabled]
[State S0]
Enable/Disable SMBUS Device.
F1
Help
↑↓
Select Item
+/-
Change Values
F9
Setup Defaults
Esc
Exit
←→
Select Menu
Enter
Select
►
Sub-Menu
F10
Save and Exit
Function
Selection
Description
SMBUS Device
Disabled
Enabled
Enable/Disable SMBUS Device.
Port 80h Cycles
LPC Bus
PCI Bus
Control where the Port 80h cycles are sent.
PCI Clock Run Logic
Disabled
Enabled
Controls PCIe clock gate power saving
feature.
HPET Support
Disabled
Enabled
Control the High Precision Event Timer
through this setup option. When enabled,
the RSDT points to the HPET table and the
proper enable bits are set.
HPET Memory Map BAR
FED00000
FED01000
FED02000
FED03000
Select the HPET Memory Map Base Address.
Enable CRID
Disabled
Enabled
Enable Compatible Revision ID.
DeepSx Mode
Disabled
Enabled only in S5/Battery
Enabled only in S4-S5/Battery
Enabled in S3-S5/Battery
Configure the DeepSx Mode configuration.
GP27 Wake From DeepSx
Disabled
Enabled
Wake From DeepSx by the assertion of GP27
pin.
State After G3
State S5
State S0
Specify what state to switch to when power is
re-applied after a power failure (G3 state).