786LCD/mITX Family
KTD-00629-K
Public User Manual
Date: 2009-10-13 Page
25 of 77
4.4.4 AGP connector - TBD
Note
Type
Signal
PIN
Signal
Type
Note
OVRCNT B1
A1
+12V
PWR
PWR
+5V B2
A2 TYPEDET
PWR
+5V B3
A3 RSVD
USB+ B4
A4 USB-
PWR
GND B5
A5 GND
PWR
INTB B6
A6 INTA
AGPCLK B7
A7
RST-
GREQ B8
A8 GGNT
PWR
+3.3V B9
A9 +3.3V
PWR
ST0
B10 A10
ST1
ST2
B11 A11
RSVD
I
RBF
B12 A12
PIPE
I
PWR
GND B13
A13 GND
PWR
RSVD B14
A14
WBF
I
I
SBA(0)
B15 A15
SBA(1)
I
PWR
+3.3V B16
A16 +3.3V
PWR
I
SBA(2)
B17 A17
SBA(3)
I
I
ADD_RS B18
A18 ADD_RS
PWR
GND B19
A19 GND
PWR
I
SBA(4)
B20 A20
SBA(5)
I
I
SBA(6)
B21 A21
SBA(7)
I
RSVD B22
A22 RSVD
PWR
GND B23
A23 GND
PWR
PWR
3V3AUX B24
A24
RSVD
PWR
+3.3V B25
A25 +3.3V
PWR
B26
A26
B27
A27
PWR
+3.3V B28
A28 +3.3V
PWR
B29
A29
B30
A30
PWR
GND B31
A31 GND
PWR
B32
A32
B33
A33
PWR
+1.5V B34
A34 +1.5V
PWR
B35
A35
B36
A36
PWR
GND B37
A37 GND
PWR
B38
A38
ADD_RS B39
A39
PWR
+1.5V B40
A40 +1.5V
PWR
M_I2CClk B41
A41 M_DVI_Data
M_I2CData B46
A46 M_DVI_Clk
PWR
+1.5V B47
A47 M_DDCData
GPERR B48
A48
PME
PWR
GND B49
A49 GND
PWR
GSERR B50
A50
B51
A51
M_DDCClk
PWR
+1.5V B52
A52 +1.5V
PWR
B53
A53
B54
A54
PWR
GND B55
A55 GND
PWR
B56
A56
B57
A57
PWR
+1.5V B58
A58 +1.5V
PWR
B59
A59
B60
A60
PWR
GND B61
A61 GND
PWR
B62
A62
B63
A63
PWR
+1.5V B64
A64 +1.5V
PWR
B65
A65
VREFCG B66
A66 VREFGC
The AGP buffers operate only in 1.5V mode (not 3.3-V tolerant). The AGP interface supports 1x/2x/4x AGP
signaling and 2x/4x Fast Writes.