Keysight Technologies N8241A, Руководство пользователя

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Chapter 5 109
Direct Digital Synthesis Option 330
Theory of Operation
requiring phase continuous frequency hopping. The DDS generates both
sine and cosine outputs for use in the complex modulator. Refer to
Figure 5-7 .
To allow waveform memory to be played back at a rate slower than the
AWG sample rate, interpolation filters have been added to the main FPGA,
for both channels. The interpolation filters can be configured to interpolate
by integer powers of two: 2, 4, 8. . ., up to a value of 1024. Image rejection
for the filters is better than 65 dBc for all interpolation rates, and flatness is
compensated for automatically in software. By setting the interpolation
filters to 1024, the waveform memory can be played back at a rate over a
thousand times slower than the AWG sample rate. The interpolation filters
can also be bypassed.
The sine and cosine outputs of the DDS, and the interpolated outputs of
waveform memory are sent to a complex (or I/Q) modulator for
upconversion. If the channel 1 interpolated memory is represented
symbolically by “I”, and the channel 2 interpolated memory by “Q”, then the
channel 1 analog output can be expressed as I*cos(wt) – Q*sin(wt).
Channel 2 can be expressed as I*sin(wt) + Q*cos(wt). Each analog output
represents a carrier (DDS output) I/Q modulated by data (channel 1 and 2
interpolated waveform memory). Alternatively, if both analog channels are
subsequently used to drive an external I/Q modulator, they are configured to
provide for upper sideband SSB conversion at the output of the external
modulator.
Both internally modulated outputs can be linearly faded in amplitude within
the AWG. The linear fade function occurs after the complex modulator.
Amplitude fade rate resolution is set to 1.819% full scale per second, with a
maximum fade rate of 62.5% full scale per nanosecond. Fade rates can be
positive or negative.