30
TK-780/H
■
Unlock Circuit
During reception, the TR signal goes high, the KEY signal
goes low, and Q10 turns on. Q11 turns on and a voltage is
applied to the collector (8R). During transmission, the TR
signal goes low, the KEY signal goes high and Q13 turns on.
Q12 turns on and a voltage is applied to 8T.
The CPU in the TX-RX unit (B/2) monitors the PLL (IC300)
LD signal directly. When the PLL is unlocked during trans-
mission, the PLL LD signal goes low. The CPU detects this
signal and makes the KEY signal low. When the KEY signal
goes low, no voltage is applied to 8T, and no signal is trans-
mitted.
Q17 turns the PC signal on or off using 8T so that the
circuit works only during transmission. With stability at low
power in mind, Q29 turns off to optimize the detection volt-
age.
The APC circuit is configured to protect overcurrent of
the power module due to fluctuations of the load at the an-
tenna end and to stabilize transmission output at voltage
and temperature variations.
Control Circuit
The CPU carries out the following tasks:
1) Controls the shift register (IC7, IC8, IC508) AF MUTE,
WIDE/NARROW, T/R KEY outputs.
2) Adjusts the AF signal level of the audio processor (IC504)
and turns the filter select compounder on or off.
3) Controls the DTMF decoder (IC507).
4) Controls the LCD assembly display data.
5) Controls the PLL (IC300).
6) Controls the D/A converter (IC5) and adjusts the volume,
modulation and transmission power.
IC508
SHIFT
REG.
IC511
CPU
Q10
SW
Q11
SW
IC300
PLL
Q13
SW
Q12
SW
LD
TX-RX UNIT (B/2)
TR
8C
8R
8T
KEY
PLL lock
: LD “H”
Fig. 7
Unlock circuit
■
Power Amplifier Circuit
The transmit output signal from the VCO is amplified to a
specified level of the power module (IC400) by the drive
block (Q203, Q204). The amplified signal passes through
the transmission/reception selection diode (D211) and goes
to a low-pass filter. The low-pass filter removes unwanted
high-frequency harmonic components, and the resulting sig-
nal is goes the antenna terminal.
■
APC Circuit
The automatic transmission power control (APC) circuit
detects part of a power module output with a diode (D27,
D30) and applies a voltage to Q21. Q21 compares the APC
control voltage (PC) generated by the D/A converter (IC5)
and DC amplifier (IC6) with the detection output voltage to
control Q19 and Q20, generates DB voltage from B voltage,
and stabilizes transmission output.
RF
AMP
Q203
RF
AMP
Q204
POWER
AMP
IC400
APC
DRIVER
Q19
DB
+B
VR1
Q20
PRI
DRIVER
DC
AMP
IC6
PC
SW
Q17
ANT
SW
D211
LPF
ANT
Q29
POWER
DET
D27,30
Q21
D36
HK,HK2
APC
CONTROL
TEMP
PROTECT
H/L
SW
H/L
IC7 5pin
25W (High power)
: “H”
8T
(TX : 8V)
TX :
PC SW ON
D15
PC
IC5
23pin
Q33
HK,HK2
TEMP
PROTECT
Fig. 8
APC circuit
IC5
D/A
converter
IC300
PLL
IC7
Shift
register
IC8
Shift
register
IC508
Shift
register
DT
RFCK
ES
EN
OE
CS
CK
DT
ACK
SD
CP
EP
AFCLR
AFMSKE
AFDAT
AFRDT
AFTRD
AFRTM
AFSTB
IC504
Audio
processor
IC507
DTMF
DECO.
IC511
CPU
TX-RX UNIT (A/2)
LCD ASSY
Fig. 9
Control circuit
■
Memory Circuit
The transceiver has a 2M-bit (256k x 8) flash ROM
(IC510) and an 8k-bit EEPROM (IC512). The flash ROM con-
tains firmware programs, data and user data which is pro-
grammed with the FPU. The EEPROM contains adjustment
data. The CPU (IC511) controls the flash ROM through an
external address bus and an external data bus. The CPU
controls the EEPROM through two serial data lines.
SCL
SDA
IC511
CPU
ADDRESS BUS
DATA BUS
IC510
FLASH
ROM
IC512
EEPROM
Fig. 10
Memory circuit
CIRCUIT DESCRIPTION
